Senior DFT Engineer — 2.5D/3D Silicon Test Innovator

NVIDIA; United States; Hybrid; USD 168,000 - 311,000; Full time

Benefits offered by this job

Equity

Benefits

Job summary

NVIDIA's DFX team is seeking an exceptional DFT Engineer to shape the future of compute. You will design and prototype breakthrough test architectures for multi-chiplet products, guiding RTL to ATE bring-up and mentoring junior engineers.

Ideal candidates have MS/PhD in Electrical Engineering or related field with 6+ years in DFT and ATPG tools. Join a leading team driving silicon test innovation across AI data center platforms and GPUs.

Qualifications

• MS/PhD or equivalent in Electrical Engineering or related field
• 6+ years hands-on Design-For-Test (DFT) experience
• Deep knowledge of DFT tools, methodologies, and test strategies for complex, large-scale designs
• Strong experience with industry standard ATPG tools
• Clear, effective communicator—strong written and verbal skills
• Passion for mentoring and scaling technical excellence in a team

Responsibilities

• Develop and deploy industry-leading test methodologies on NVIDIA's next-generation silicon platforms
• Collaborate with leading EDA vendors to shape tool capabilities and partner with internal CAD teams to drive scalable, automated solutions
• Co-architect novel DFT strategies alongside VLSI and Product Engineering teams to push silicon test innovation
• Own the full ATPG lifecycle—from verification to pattern generation and ATE bring-up
• Guide and mentor junior engineers to navigate design trade-offs and achieve high quality and efficiency

Skills

DFT expertise

ATPG experience

Mentoring

Communication skills

Design-For-Test

Education

MS/PhD in Electrical Engineering or related field

Tools

DFT tools

ATPG tools

EDA tool flows

Job description

NVIDIA's DFX team is seeking an exceptional DFT Engineer to shape the future of compute. You will design and prototype breakthrough test architectures for multi-chiplet products, guiding RTL to ATE bring-up and mentoring junior engineers.

Ideal candidates have MS/PhD in Electrical Engineering or related field with 6+ years in DFT and ATPG tools. Join a leading team driving silicon test innovation across AI data center platforms and GPUs.