Senior DFT Methodology Engineer - Equity Eligible

NVIDIA Corporation; Santa Clara, Northern (CA, KY); Hybrid; USD 168,000 - 265,000; Full time

Job summary

NVIDIA is seeking a DFT Methodology Engineer in Santa Clara, CA. You will own and implement test access methodologies across cross-functional teams, shaping next-generation GPU designs with memory BIST, scan, and DFX security.

You will mentor junior engineers, collaborate with RTL, timing, physical design, software, bring-up and production teams, and help optimize trade-offs between cost and quality while delivering robust test solutions for multi-million gate designs.

Qualifications

• Master’s degree in Electrical Engineering or related field with proven experience in DFT or related domains.
• 10+ years of hands-on experience in SoC architecture, RTL design, and verification.
• Excellent analytical skills in verification and validation of test patterns and logic on complex designs.
• Good exposure to RTL & clocks design, STA, place-n-route and power trade-offs.
• Experience in Silicon debug and bring-up on the ATE with pattern formats and test program development.
• Knowledge of DFT security and hardware system security is a plus.
• Exceptional written and oral interpersonal skills with the curiosity to work on rare challenges.

Responsibilities

• Own and work with cross functional teams, implementing state-of-the-art designs in test access mechanisms, I1149.1, I1500, I1687, 1838, memory BIST, scan and memory dump and DFX security methodology.
• In addition, you will help architect, develop and deploy DFT methodologies for our next generation products including RTL design, Verification, pattern generation, partnering with teams like timing, physical design, software, bringup, production.
• You will also help mentor junior engineers on test designs and trade-offs including cost and quality.

Skills

SoC architecture

RTL design

Verification

DFT security

Cross-functional collaboration

Analytical skills

Education

Master's degree in Electrical Engineering

Job description

NVIDIA is seeking a DFT Methodology Engineer in Santa Clara, CA. You will own and implement test access methodologies across cross-functional teams, shaping next-generation GPU designs with memory BIST, scan, and DFX security.

You will mentor junior engineers, collaborate with RTL, timing, physical design, software, bring-up and production teams, and help optimize trade-offs between cost and quality while delivering robust test solutions for multi-million gate designs.