Senior DFT Architect for Silicon Validation & Yield

NVIDIA Corporation; Santa Clara (CA); On-site; USD 168,000 - 311,000; Full time

Benefits offered by this job

Equity

Competitive benefits

Job summary

NVIDIA, Santa Clara, CA, is seeking a Senior DFT - Silicon Validation Engineer to accelerate and lead silicon validation for NVIDIA’s complex semiconductor chips. You will collaborate across teams to define DFT strategies and drive post-silicon bring-up, while advancing test methodologies for future GPUs and accelerators.

Ideal candidates have strong DFT, silicon debug, and scripting skills, with a track record in yield improvement and pre-silicon validation.

Qualifications

• 8+ years in DFT or related domains (BSEE)
• Experience with silicon debug, bring-up and productization of DFT features
• Leadership in yield ramp and waste reduction for multiple products
• Hands-on pre-silicon validation for DFT features
• Strong written and oral communication skills
• Strong programming and scripting skills in Perl, Python, or Tcl

Responsibilities

• Collaborate with multi-functional teams to drive silicon validation of NVIDIA’s chips.
• Drive end-to-end DFT architecture and methodologies to accelerate post-silicon bring-up and characterization.
• Define next-generation test strategies for ATE aligned with the product roadmap.
• Work across functions to ensure scalable DFT feature deployment across platforms.

Skills

Silicon DFT

Scripting

Education

BSEE or equivalent

MSEE

PhD in related field

Tools

Perl

Python

Tcl

Job description

NVIDIA, Santa Clara, CA, is seeking a Senior DFT - Silicon Validation Engineer to accelerate and lead silicon validation for NVIDIA’s complex semiconductor chips. You will collaborate across teams to define DFT strategies and drive post-silicon bring-up, while advancing test methodologies for future GPUs and accelerators.

Ideal candidates have strong DFT, silicon debug, and scripting skills, with a track record in yield improvement and pre-silicon validation.