Senior Design Verification Engineer — FPGA/ASIC, UVM, AI Tools

Viasat

Independence Township (OH)

On-site

USD 156,000 - 246,000

Full time

3 days ago
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Benefits offered by this job

Health insurance

Job summary

Viasat is seeking a seasoned Design Verification Engineer to join a talented team focused on cutting-edge communications technology. You will drive RTL verification for FPGA and ASIC designs, build robust UVM testbenches, and work with RTL, System, and software engineers to ensure thorough coverage and fast time-to-market.

The role requires 8+ years in verification, a Bachelor’s in Electrical/Computer Engineering, and experience with Questa, Xcelium, and VCS.

Qualifications

  • 8+ years in design verification including UVM experience.
  • Experience creating and using UVM testbenches.
  • Proficiency with industry simulators (Questa, Xcelium, VCS).
  • Bachelor's in Electrical/Computer Engineering or related field.
  • U.S. citizenship and ability to travel up to 10% and obtain secret clearance.

Responsibilities

  • Architecting and implementing design verification environments for ASICs and FPGAs.
  • Developing drivers, monitors, scoreboards, sequences, and model predictors.
  • Managing regressions, coverage, and resources; collaborating with RTL and software teams.
  • Performing debug and contributing to test plans and status reporting.
  • Evaluating and deploying new verification technologies as they become available.

Skills

UVM
SystemVerilog
Digital design
RTL verification
C/ODL-like scripting

Education

Bachelor's Degree in Electrical Engineering or Computer Engineering

Tools

Questa
Xcelium
VCS
AI agentic verification tools

Job description

Viasat is seeking a seasoned Design Verification Engineer to join a talented team focused on cutting-edge communications technology. You will drive RTL verification for FPGA and ASIC designs, build robust UVM testbenches, and work with RTL, System, and software engineers to ensure thorough coverage and fast time-to-market.

The role requires 8+ years in verification, a Bachelor’s in Electrical/Computer Engineering, and experience with Questa, Xcelium, and VCS.

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