FPGA Verification Engineer Air Dominance and Strike Fastwater Staffing

HIKINEX; Costa Mesa (CA); On-site; USD 110,000 - 160,000; Full time

Job summary

HIKINEX in Costa Mesa, CA seeks an FPGA/ASIC verification engineer to architect UVM-based environments for AMD Xilinx FPGA/SoC designs. You will develop verification plans and author SVA checks to ensure protocol compliance and design intent.

Responsibilities include building coverage models, constrained-random test sequences, and regression suites while collaborating with RTL and hardware teams to ensure robust verification and DO-254 alignment.

Qualifications

• Bachelor's degree in Electrical Engineering, Computer Engineering, or related field.
• 2+ years of experience in FPGA/ASIC verification.
• Proficient in SystemVerilog, UVM, and SVA; experience extending UVM testbenches.
• Object-oriented programming principles.
• Industry simulators (Questa, VCS, Xcelium, or Vivado).
• Git-based collaborative workflows including code review.
• Linux development environments.
• Strong communication and teamwork skills.

Responsibilities

• Architect and implement UVM verification environments for FPGA/SoC designs.
• Develop verification plans with traceability to system and hardware requirements.
• Author SystemVerilog Assertions (SVA) for protocol compliance and design intent checks.
• Build functional coverage models and drive code coverage analysis to closure.
• Develop constrained-random and transaction-level test sequences to maximize coverage and uncover corner-case bugs.
• Establish and maintain regression suites, tracking coverage metrics and verification progress.
• Debug failures using waveform tools and simulation logs at the HDL and system level.
• Collaborate with design engineers on RTL reviews, bug resolution, and micro-architecture refinement.
• Support hardware validation and board bring-up on target platforms.
• Ensure verification meets DO-254 and relevant safety standards.
• Author verification closure reports and coverage analysis summaries.

Skills

Object-oriented programming principles

Strong communication

Education

Bachelor's degree in Electrical Engineering, Computer Engineering, or related field

Master's degree in Electrical Engineering, Computer Engineering, or related field

Tools

SystemVerilog

UVM methodology

SVA

Questa

VCS

Xcelium

Vivado

Git

Linux

Job description

WHAT YOU'LL DO

• Architect and implement UVM verification environments (drivers, monitors, predictors, scoreboards) for AMD (Xilinx) FPGA/SoC designs
• Develop verification plans with traceability to system and hardware requirements
• Author SystemVerilog Assertions (SVA) for protocol compliance and design intent checks
• Build functional coverage models and drive code coverage analysis to closure
• Develop constrained-random and transaction-level test sequences to maximize coverage and uncover corner-case bugs
• Establish and maintain regression suites, tracking coverage metrics and verification progress
• Debug failures using waveform tools and simulation logs at the HDL and system level
• Collaborate with design engineers on RTL reviews, bug resolution, and micro-architecture refinement
• Support hardware validation and board bring-up on target platforms
• Ensure verification meets DO-254 and relevant safety standards
• Author verification closure reports and coverage analysis summaries

REQUIRED QUALIFICATIONS

• Bachelor\'s degree in Electrical Engineering, Computer Engineering, or related field
• 2+ years of experience in FPGA/ASIC verification
• Proficient in SystemVerilog, UVM methodology and SVA, with experience contributing to and extending UVM testbenches
• Object-oriented programming principles
• Industry simulators (Questa, VCS, Xcelium, or Vivado)
• Git-based collaborative workflows including code review
• Linux development environments
• Strong communication and teamwork skills
• Eligible to obtain and hold a U.S. Secret security clearance

PREFERRED QUALIFICATIONS

• 5+ years of experience in FPGA/ASIC verification
• Master\'s degree in Electrical Engineering, Computer Engineering, or related field
• DO-254, avionics verification standards for UAS, and safety-critical verification processes
• SVUnit or equivalent unit-testing frameworks
• Formal verification or CDC verification tools
• Digital interfaces: Ethernet, PCIe, JESD204C, MIL-STD-1553, SPI
• Verification automation scripting (Python, Tcl, Makefile)
• SoC and ARM-based embedded platforms
• Verification automation, CI/CD integration, and Nix-based build environments