Senior Design Automation Engineer: NAND & AI Flows

Micron Technology, Inc; San Jose (CA); Hybrid; USD 176,000 - 298,000; Full time

Benefits offered by this job

Medical insurance

Dental plan

Vision plan

Bonuses

Equity

Job summary

Micron Technology, Inc. in San Jose seeks a Staff/Principal Design Engineer to drive NAND circuit development through design automation and environment transitions.

You will implement core Xpath/Ypath and Array design, validate performance with block and chip-level simulations, and collaborate with product engineering and validation teams. Responsibilities include analog/mixed-signal design, RTL/Verilog, and developing agentic enablement for automation including AI-assisted flows for setup,

Qualifications

• MS in Electrical Engineering; 8+ years NAND design experience
• Proficiency in analog/mixed-signal circuit design and related layouts
• Proficiency in circuit verification flows and simulations
• Proficiency in Python for engineering automation; Cadence tools and UNIX fluency

Responsibilities

• Implement core Xpath, Ypath and Array design during project execution.
• Implement analog/mixed signal circuit design to meet specifications and validate with simulations.
• Serve as technical authority across analog/core teams for modeling, simulation, and automation reliability.
• Develop agentic enablement for circuit design including AI/LLM-assisted flows and self-healing configurations.
• Integrate automation with project execution and collaborate with multi-functional teams to improve cycle time.

Skills

NAND design

Analog/mixed-signal

Python automation

Verilog RTL

Circuit verification

Education

MS (PhD preferred) in Electrical Engineering

Tools

Cadence design

LVS/DRC tools

UNIX

Job description

Micron Technology, Inc. in San Jose seeks a Staff/Principal Design Engineer to drive NAND circuit development through design automation and environment transitions.

You will implement core Xpath/Ypath and Array design, validate performance with block and chip-level simulations, and collaborate with product engineering and validation teams. Responsibilities include analog/mixed-signal design, RTL/Verilog, and developing agentic enablement for automation including AI-assisted flows for setup,