NAND Memory Design Engineer – AI-Driven, High-Speed

Micron Technology, Inc.; California; Sur place; USD 83 000 - 198 000; Plein temps

Résumé du poste

Micron Technology, Inc. in the United States is seeking a Design Engineer to contribute to memory product development by assisting with the design, layout, and optimization of datapath circuits for NAND flash memory, and to help shape major datapath architectural changes for higher speed and lower power.

You will collaborate with other engineers on planning, layout, and validation activities, drive silicon experiments with the PE team, and use AI tools to accelerate workflows while delivering

Qualifications

• BS or MS in Electrical Engineering required; 0–2 years in semiconductor manufacturing.
• Understanding of physical design flows, high-speed IO performance, power/area optimization.
• Ability to participate in complex design projects and communicate progress.

Responsabilités

• Manage major IO/datapath block (input receiver, serializer, deserializer, clock distribution, equalizer, ZQ calibration, ONFI training features, wave pipeline) to meet specifications and verify functionality and performance
• Model parasitics and review layout regularly and find opportunities of improving area/power
• Communicate with project integration and other functional teams on specifications of major block interfaces
• Communicate with PE to drive silicon experiments and propose and implement fixes for yield improvement and silicon debugging
• Document and review final results with senior engineers and project partners
• Leverage AI and automation to facilitate workflow acceleration and ongoing research

Connaissances

Physical design flows

High-speed IO performance

Power and area optimization

Chip architecture / floorplanning

AI for design improvement

Cross-functional collaboration

Formation

BS or MS in Electrical Engineering

PhD in Electrical Engineering

Description du poste

Micron Technology, Inc. in the United States is seeking a Design Engineer to contribute to memory product development by assisting with the design, layout, and optimization of datapath circuits for NAND flash memory, and to help shape major datapath architectural changes for higher speed and lower power.

You will collaborate with other engineers on planning, layout, and validation activities, drive silicon experiments with the PE team, and use AI tools to accelerate workflows while delivering