Senior Design Engineer, NAND & AI-Driven Systems

Micron Technology, Inc.

San Jose, Northern (CA, KY)

Hybrid

USD 120,000 - 204,000

Full time

10 days ago

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Benefits offered by this job

Medical, dental, vision plans
Paid time off
Equity and bonus potential

Job summary

Micron Technology, Inc. in San Jose, CA is seeking a Senior Design Engineer to advance NAND design for memory products. The role emphasizes waveform development for read/program/erase, cross-team collaboration with Firmware, Analog, and Design Validation, and integration of core blocks into full-chip schematics.

The candidate should bring NAND design experience (4+ years), strong Python scripting, and a solid foundation in semiconductor device physics. MS in EE is required; PhD is preferred.

Qualifications

  • PhD preferred; MS in electrical engineering required.
  • 4+ years of NAND design experience.
  • Strong Python scripting and circuit debugging abilities.

Responsibilities

  • Develop array waveforms with timing and biasing for NAND read/program/erase.
  • Collaborate with Firmware, Analog and Design Validation teams.
  • Plan wordline/bitline path architecture to meet area, performance and power specs.
  • Generate Xpath, Ypath and Array schematics; integrate core into full-chip schematics.
  • Perform circuit simulations and oversee layout; develop Python automations.

Skills

NAND design experience
Python scripting
Problem-solving
Teamwork
Verbal communication

Education

MS in electrical engineering
PhD preferred

Tools

Cadence LVS/DRC
HSPICE/ Fast SPICE
Verilog

Job description

Micron Technology, Inc. in San Jose, CA is seeking a Senior Design Engineer to advance NAND design for memory products. The role emphasizes waveform development for read/program/erase, cross-team collaboration with Firmware, Analog, and Design Validation, and integration of core blocks into full-chip schematics.

The candidate should bring NAND design experience (4+ years), strong Python scripting, and a solid foundation in semiconductor device physics. MS in EE is required; PhD is preferred.

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