Senior Design Automation Engineer — AI IC Packaging & PCB

Amazon Inc.

Austin (TX)

On-site

USD 185,000 - 250,000

Full time

4 days ago
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Benefits offered by this job

Health insurance
401(k) matching
Paid time off

Job summary

Annapurna Labs, part of Amazon, seeks a Senior Design Automation Engineer to advance physical design for Package and PCB in next-generation ML and data center ASICs. You will develop automation from floor planning to tape-out, collaborating with SI/PI, thermal, and manufacturing teams to deliver production-ready designs that meet performance targets.

You will build data integration flows, write Python/Skill/TCL, and contribute to cross-level optimization while refining DFM rules across OSATs and

Qualifications

  • Bachelor's degree in Computer Science, Computer Engineering, or Electrical Engineering
  • 7+ years of experience working with physical design tools across Package and PCB domains: Allegro, APD, 3DICC, Expedition
  • 10+ years of Automation experience for physical designs

Responsibilities

  • Develop and deploy efficient design methodologies to support Package and PCB layout tasks across the design cycle: die floor planning, bump/pad assignment, RDL routing, substrate design, verification, and tape out release.
  • Evaluate industry EDA offerings and make recommendations for purchase and usage of advanced packaging features to design 2.5D interposer, 3D-IC, fan-out wafer-level packaging, and silicon bridge technologies (e.g., CoWoS, EMIB, or similar).
  • Deliver custom design automation to improve RDL and substrate routing for high-density interconnects including microbumps, C4 bumps, TSVs, microvias, and PTH vias across multi-layer organic substrates or silicon interposers.
  • Contribute to cross-level teams for co-optimization across die RDL, interposer/substrate, and PCB levels under guidance from senior engineers.
  • Develop data integration flows for co-design data across Package, PCB and SI/PI flows.
  • Develop software in the following languages: Python, Skill, TCL. Utilize AI coding agents to speed development and iteration.
  • Identify preferred methodologies to integrate physical verification checks (DRC, connectivity, shorts/opens) into physical design cycles.
  • Follow and help refine package design rules and guidelines, working with OSAT partners and foundries to ensure DFM compliance.
  • Collaborate with SI/PI engineers to incorporate electrical constraints into the physical layout methodologies — impedance-controlled routing, power plane optimization, and critical net shielding.

Job description

Annapurna Labs, part of Amazon, seeks a Senior Design Automation Engineer to advance physical design for Package and PCB in next-generation ML and data center ASICs. You will develop automation from floor planning to tape-out, collaborating with SI/PI, thermal, and manufacturing teams to deliver production-ready designs that meet performance targets.

You will build data integration flows, write Python/Skill/TCL, and contribute to cross-level optimization while refining DFM rules across OSATs and

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