Senior CPU Subsystem RTL Designer & Verification

Imec India Private Limited; Town of Belgium (WI); On-site; USD 100,000 - 140,000; Full time

Job summary

Imec India Private Limited is seeking a Digital Designer for their CPU subsystem. The role requires a strong background in RTL design and verification in a collaborative research environment. Candidates should have at least 5 years of relevant experience, particularly in SystemVerilog and CPU microarchitecture. This position offers a temporary contract with potential for extension.

Join a diverse team making significant advancements in next-generation computing technologies.

Qualifications

• 5+ years of RTL design experience in SystemVerilog/Verilog for complex digital subsystems.
• Solid grasp of CPU microarchitecture.
• Strong functional verification capability with UVM and assertions.

Responsibilities

• Translate microarchitectural specifications into synthesizable RTL.
• Integrate subsystems and develop verification environments.
• Collaborate with architects to refine specifications.

Skills

RTL design experience

CPU microarchitecture understanding

Functional verification capability

Scripting for verification automation

Excellent English communication

Tools

SystemVerilog

UVM

EDA tools

Python

Job description

Imec India Private Limited is seeking a Digital Designer for their CPU subsystem. The role requires a strong background in RTL design and verification in a collaborative research environment. Candidates should have at least 5 years of relevant experience, particularly in SystemVerilog and CPU microarchitecture. This position offers a temporary contract with potential for extension.

Join a diverse team making significant advancements in next-generation computing technologies.