Senior CPU RTL Engineer - Frontend Microarchitecture & PPA

Google LLC; Austin (TX); On-site; USD 192,000 - 278,000; Full time

Benefits offered by this job

Bonus target 20%

Equity

Benefits

Job summary

Google LLC in Austin seeks an experienced hardware engineer to help develop CPU subsystems and front-end designs for next-gen AI accelerators. You will influence microarchitecture decisions, RTL implementations, and power/performance trade-offs, collaborating with software, architecture, and verification teams.

Strong SystemVerilog and RTL design background with leadership in front-end design for processor components or accelerators is required.

Qualifications

• Bachelor's degree or equivalent practical experience in EE/CE/CS.
• 8 years of CPU or AI accelerator RTL design experience with microarchitecture and PPA optimizations.
• Experience with SystemVerilog and related design processes (Lint, UPF).

Responsibilities

• Develop CPU subsystem and front-end designs with emphasis on microarchitecture and RTL.
• Propose microarchitecture features and collaborate with Software, Architect, and Performance teams.
• Communicate pros/cons of enhancements and ensure designs meet PPA goals.
• Coordinate with Verification, Physical Design, and Power teams for production-quality designs.
• Translate modern design techniques into actionable RTL constructs for performance evaluation.

Skills

RTL design

SystemVerilog

Microarchitecture

Power/Performance/Area

Education

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field

Master's or PhD preferred

Tools

Lint

UPF

ARM ISA

Job description

Google LLC in Austin seeks an experienced hardware engineer to help develop CPU subsystems and front-end designs for next-gen AI accelerators. You will influence microarchitecture decisions, RTL implementations, and power/performance trade-offs, collaborating with software, architecture, and verification teams.

Strong SystemVerilog and RTL design background with leadership in front-end design for processor components or accelerators is required.