Senior CPU RTL & Microarchitecture Engineer for AI Accelerator

Google LLC

Mountain View (CA)

On-site

USD 192,000 - 278,000

Full time

3 hours ago
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Benefits offered by this job

Bonus target 20%
Equity
Benefits

Job summary

Google LLC in Mountain View is seeking a senior engineer to own CPU subsystem design and RTL for the next generation of processors. You will shape microarchitecture, drive PPA optimizations, and work with software, architecture, and verification teams to deliver high-performance hardware.

Be part of a team that delivers cutting-edge silicon powering products loved by millions worldwide, with competitive compensation and equity opportunities.

Qualifications

  • Bachelor's degree in EE/CE/CS or equivalent practical experience.
  • 8 years of experience in CPU or AI accelerator RTL design, including microarchitecture and PPA optimizations.
  • Experience with RTL language SystemVerilog and related design flows (Lint, UPF).

Responsibilities

  • Develop CPU subsystem front-end designs with emphasis on microarchitecture and RTL for next-gen CPUs.
  • Propose microarchitecture enhancements and collaborate with Software, Architect, and Performance teams for trade-off studies.
  • Communicate pros and cons of microarchitecture changes and deliver designs meeting PPA goals.
  • Work with Verification, Physical Design and Power teams to meet frequency, power and area targets.
  • Learn modern techniques and translate them into design constructs and languages to guide performance evaluation.

Skills

RTL design
SystemVerilog
PPA optimization

Education

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent practical experience
Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with emphasis on computer architecture

Tools

Lint
UPF

Job description

Google LLC in Mountain View is seeking a senior engineer to own CPU subsystem design and RTL for the next generation of processors. You will shape microarchitecture, drive PPA optimizations, and work with software, architecture, and verification teams to deliver high-performance hardware.

Be part of a team that delivers cutting-edge silicon powering products loved by millions worldwide, with competitive compensation and equity opportunities.

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