Senior CPU Power Management RTL Architect

Apple Inc.; Beaverton (OR); On-site; USD 130,000 - 160,000; Full time

Job summary

A global technology leader in Beaverton is looking for a CPU RTL Architect to drive architecture and RTL for innovative power management solutions. The role requires a minimum of a BS degree and over 10 years of industry experience in microprocessor architecture and logic design principles. Ideal candidates will possess strong skills in Verilog or VHDL, simulation, and debugging, alongside a deep understanding of low-power microarchitecture techniques. Join us to help deliver groundbreaking products that redefine industry standards.

Qualifications

• Minimum BS and 10+ years of relevant industry experience.
• Experience with microprocessor architecture.
• Experience with logic design principles with timing and power implications.

Responsibilities

• Micro-architecture development and specification.
• RTL ownership and assessment for design targets.
• Support verification team in test bench and simulation for functional verification.

Skills

Microprocessor architecture

Verilog or VHDL

Simulators and waveform debugging

Education

BS degree

Tools

C or C++ programming

Perl or Python

Job description

A global technology leader in Beaverton is looking for a CPU RTL Architect to drive architecture and RTL for innovative power management solutions. The role requires a minimum of a BS degree and over 10 years of industry experience in microprocessor architecture and logic design principles. Ideal candidates will possess strong skills in Verilog or VHDL, simulation, and debugging, alongside a deep understanding of low-power microarchitecture techniques. Join us to help deliver groundbreaking products that redefine industry standards.