Senior CPU RTL Engineer - High-Performance, Low-Power

Qualcomm; San Diego (CA); On-site; USD 167,000 - 251,000; Full time

Job summary

Qualcomm Technologies, Inc. is hiring talented engineers for CPU RTL development aimed at high-performance, low-power devices. You will collaborate with chip architects on micro-architecture concepts and contribute to architecture/product definition early in the lifecycle.

Role requires strong knowledge of CPU architecture, Verilog/VHDL, and RTL ownership. You will work with multi-functional teams to deliver optimized timing, power, and area while supporting verification and new features.

Qualifications

• MS degree in Computer or Electrical Engineering with 5+ years of CPU RTL or similar experience.
• Thorough knowledge of microprocessor architecture including Timers, Interrupt controller, Configuration access protocols, RAS and safety, AMU/PMU, Power management architectures, Clock architecture, Debug/Trace.

Responsibilities

• Performance exploration with CPU modeling team.
• Microarchitecture development and specification from high-level exploration to detailed specs.
• RTL ownership and refinement targeting power, performance, area and timing.
• Functional verification support for verification strategy.
• Performance verification to ensure RTL meets goals.
• Design delivery with cross-functional teams focusing on timing, area, reliability, and power.
• Collaborate with Software, Firmware and platform teams to enable CPU features in products.

Skills

Verilog

VHDL

CPU architecture

Digital design

Power management

Timing analysis

Scripting (Perl/Python)

Education

MS degree in Computer or Electrical Engineering

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field

PhD in Electrical Engineering, Computer Engineering, Computer Science, or related field

Tools

Verilog simulators

Waveform debugging tools

Job description

Qualcomm Technologies, Inc. is hiring talented engineers for CPU RTL development aimed at high-performance, low-power devices. You will collaborate with chip architects on micro-architecture concepts and contribute to architecture/product definition early in the lifecycle.

Role requires strong knowledge of CPU architecture, Verilog/VHDL, and RTL ownership. You will work with multi-functional teams to deliver optimized timing, power, and area while supporting verification and new features.