Senior Coherent Interconnect Verification Engineer

Samsung Semiconductor; San Jose (CA); On-site; USD 151,000 - 251,800; Full time

Benefits offered by this job

Medical, dental, vision insurance

401(k)

Tuition assistance after 6 months

Paid time off

Wellness incentives

Job summary

A leading semiconductor company located in San Jose, California is seeking a Design Verification Engineer to enhance System IP related to coherent interconnects. This role requires a strong background in design verification, testbench architecture, and excellent collaboration skills. Candidates should have substantial experience in the field and proficiency in System Verilog and ARM protocols. The position offers a competitive salary range of $151,000 to $251,800, along with comprehensive benefits. Opportunities for career growth and relocation assistance are available.

Qualifications

• 10+ years of experience with a Bachelor's Degree, or 8+ years with a Master's Degree, or 6+ years with a Ph.D.
• 8+ years in a design verification role building testbenches from scratch.
• Strong background in design verification of coherent interconnects.
• Proficiency in ARM protocols – CHI, AXI, ACElite, APB.
• Strong coding skills in System Verilog and UVM.

Responsibilities

• Contribute to verification of System IP, including coherent interconnects.
• Develop and maintain verification environments and testbenches.
• Support design excellence and thorough verification of key features.
• Collaborate with cross-functional teams to analyze and debug failures.

Skills

Design verification

Testbench architecture

SystemVerilog

C++

Git version control

Communication skills

Education

Bachelor’s Degree in Computer Science/Engineering

Master’s Degree

Ph.D.

Tools

UVM

Unix/Perl scripting

Job description

A leading semiconductor company located in San Jose, California is seeking a Design Verification Engineer to enhance System IP related to coherent interconnects. This role requires a strong background in design verification, testbench architecture, and excellent collaboration skills. Candidates should have substantial experience in the field and proficiency in System Verilog and ARM protocols. The position offers a competitive salary range of $151,000 to $251,800, along with comprehensive benefits. Opportunities for career growth and relocation assistance are available.