Senior Chip Verification Engineer — SystemVerilog & UVM

Apple, Inc.; Cupertino (CA); On-site; USD 174,000 - 225,000; Full time

Job summary

APPLE INC. in Cupertino, CA, USA, seeks a Master’s-educated verification engineer to design and verify next-generation chip designs. You will review specifications, collaborate with cross-functional teams, develop test plans, and refine verification methodologies to ensure robust performance and coverage.

The role involves running regressions, analyzing coverage data, and delivering well-documented verification results. Base pay ranges with opportunities for bonuses and relocation are provided.

Qualifications

• Master’s degree or foreign equivalent in Electrical Engineering or related field.

Responsibilities

• Review design and architecture specifications to ensure alignment with functional and performance goals.
• Collaborate closely with design and micro-architecture teams to understand design requirements, constraints, and real-world use cases.
• Develop comprehensive test plans, test cases, and coverage plans to validate functionality and performance of chip design.
• Refine and design Apple's next-generation verification methodology and test benches to improve efficiency and effectiveness.
• Run and triage regressions to identify and resolve issues in the chip design.
• Track issues and evaluate coverage data to ensure thorough testing and verification coverage.
• Communicate actively and collaborate with design, architecture, and software teams to understand use cases and corner conditions for driving effective test case development.

Skills

SystemVerilog test benches

OOP principles

UVM

verification plans

Python/Ruby/Perl scripting

Cadence Xcelium

waveform debuggers (Verdi/Indago)

UNIX/Linux utilities

algorithmic reference models

cross-functional collaboration

Education

Master’s degree in Electrical Engineering

Tools

Cadence Xcelium

Verdi

Indago

Job description

APPLE INC. in Cupertino, CA, USA, seeks a Master’s-educated verification engineer to design and verify next-generation chip designs. You will review specifications, collaborate with cross-functional teams, develop test plans, and refine verification methodologies to ensure robust performance and coverage.

The role involves running regressions, analyzing coverage data, and delivering well-documented verification results. Base pay ranges with opportunities for bonuses and relocation are provided.