Senior Chip Lead - Physical Design Architect

Cadence Design Systems, Inc.; Austin (TX); On-site; USD 180,000 - 260,000; Full time

Job summary

Cadence Design Systems, Inc. in Austin seeks highly skilled Physical Design Architects and Chip Leads to drive RTL-to-GDS services for advanced FinFETs. You will lead a design team, own critical decisions, and work with customers to meet PPAS targets.

Key responsibilities include directing design for test, sign‑off criteria, and toolchain optimization, with collaboration across Cadence and client teams. This role requires extensive experience, high-level problem solving, and strong scripting

Qualifications

• Fifteen+ years in Physical Design with complete design closure experience.
• Strong knowledge of digital design fundamentals and timing analysis.
• Experience with IC flows, Place & Route, and power closure.
• Ability to lead customer engagements and make technical decisions.
• Proficiency with Cadence or equivalent EDA tools and scripting.

Responsibilities

• Lead Physical Design and DFT teams on RTL to GDS for SoCs.
• Engage with customers to meet PPAS targets and schedule.
• Guide node/foundry selection and sign‑off criteria for cost/features.
• Collaborate with Cadence teams to present tech and AI initiatives.
• Ensure key metrics are achieved before physical design gate.
• Partner with R&D to enhance tools and methodologies.
• Document best practices and lessons learned for future programs.

Skills

Fifteen+ years experience

Digital design fundamentals

Scripting languages

Education

Bachelor's degree in CS/Engineering

Master's degree (preferred)

Tools

Genus

Innovus

Conformal

Tempus

Modus

Voltus

ICC/ICC2

Primetime

Job description

Cadence Design Systems, Inc. in Austin seeks highly skilled Physical Design Architects and Chip Leads to drive RTL-to-GDS services for advanced FinFETs. You will lead a design team, own critical decisions, and work with customers to meet PPAS targets.

Key responsibilities include directing design for test, sign‑off criteria, and toolchain optimization, with collaboration across Cadence and client teams. This role requires extensive experience, high-level problem solving, and strong scripting