Senior CAD Engineer: Lead Scalable ASIC Flows & Automation

TYLsemi

United States

Remote

USD 150,000 - 190,000

Full time

14 days+

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Job summary

TYLsemi is seeking an experienced Senior CAD Engineer to develop, deploy, and support advanced VLSI CAD methodologies and automation across RTL-to-GDS flows. You will collaborate with Physical Design, Frontend, DFT, STA, and EDA vendors to enable robust CAD infrastructure and successful tape-outs for complex SOCs.

The role emphasizes building scalable CAD flows for synthesis, physical design, STA, low-power verification, and signoff; driving automation to improve QoR and runtime; and mentoring

Qualifications

  • Bachelor’s or Master’s degree in Electronics, Computer Engineering, VLSI, or related field.
  • 5+ years of experience in CAD engineering, physical design methodology, or EDA flow development.
  • Strong expertise in ASIC/SoC implementation flows including synthesis, P&R, STA, physical verification, and low-power methodologies.
  • Hands-on experience with Cadence, Synopsys, and Siemens EDA tool suites.
  • Strong programming and scripting skills in Tcl, Python, Perl, and Shell scripting.
  • Experience with distributed computing environments, regression frameworks, and infrastructure management.
  • Strong debugging, analytical, communication, and stakeholder management skills.

Responsibilities

  • Develop, and maintain scalable CAD flows for synthesis, physical design, STA, low-power verification, and signoff.
  • Drive automation and methodology improvements to enhance design efficiency, runtime, and QoR.
  • Collaborate with design, verification, DFT, and implementation teams to understand flow requirements and deployment challenges.
  • Debug complex flow, tool, and infrastructure-related issues across project execution.
  • Integrate and qualify new EDA tool releases and advanced node methodologies.
  • Develop automation scripts, regression environments, dashboards, and flow monitoring infrastructure.
  • Work with foundries and EDA vendors on technology enablement and issue resolution.
  • Mentor engineers and establish CAD best practices across teams.

Skills

CAD engineering
Physical design
EDA flow development
ASIC/SoC flows
Synthesis
P&R
STA
Physical verification
Low-power methodologies
Tcl scripting
Python scripting
Perl scripting
Shell scripting
Debugging
Collaboration

Education

Bachelor’s or Master’s degree in Electronics, Computer Engineering, VLSI, or related field

Tools

Cadence tools
Synopsys tools
Siemens EDA tool suites

Job description

TYLsemi is seeking an experienced Senior CAD Engineer to develop, deploy, and support advanced VLSI CAD methodologies and automation across RTL-to-GDS flows. You will collaborate with Physical Design, Frontend, DFT, STA, and EDA vendors to enable robust CAD infrastructure and successful tape-outs for complex SOCs.

The role emphasizes building scalable CAD flows for synthesis, physical design, STA, low-power verification, and signoff; driving automation to improve QoR and runtime; and mentoring

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