Senior 3D-IC and SoC CAD Automation Engineer

Advanced Micro Devices, Inc.; Austin (TX); Hybrid; USD 150,000 - 190,000; Full time

Benefits offered by this job

AMD benefits at a glance

Job summary

AMD in Austin, TX is seeking a senior CAD engineer for 3D-IC and advanced packaging design, from RTL to signoff, collaborating with global design teams. You will lead automation efforts, debug large netlists, and partner with Synopsys/Cadence on features and AI co-development. The role emphasizes ML-driven optimization and QoR improvements.

You will contribute to strategy for future nodes, leverage AI in CAD workflows, and work across sites and time zones to deliver robust tools and flows.

Qualifications

• Strong understanding of industry EDA tools, with emphasis on place-and-route, extraction, and analysis tools (e.g., ICC2, Innovus, Primetime, etc.).
• Familiarity with chip- or system-level netlists and ability to debug connectivity across industry-standard formats (DEF/LEF/SPEF/Verilog/UPF/OAS/GDS).
• Exposure with system level design verification processes including LEC, LVS, DRC, etc.
• Comfort navigating large datasets and utilizing automation, distributed and cloud compute environments.
• Demonstrated experience applying AI (ML-based optimization, LLM-assisted automation, agentic frameworks) to CAD, EDA, or hardware design problems.
• Strong scripting skills in Python, TCL, and Perl within a Linux/Unix environment.
• Experience with advanced-node tapeouts across silicon technologies.
• Exposure to Advanced Packaging technologies preferred (2.5D, 3D, 3.5D, including interposers and silcion bridges).
• Exposure to chip-level construction (PDN, bump planning) and analysis a plus.
• Excellent verbal and written communication skills.

Responsibilities

• Implement and maintain 3D-IC and advanced packaging design flows from RTL through signoff.
• Lead hands-on debug and automation involving large chip level physical and logical netlists.
• Partner with EDA vendors (Synopsys, Cadence) on 3D-IC feature requirements, enhancement requests, and AI co-development opportunities.
• Partake in deep-dive discussions to provide guidelines to various organizations across AMD.
• Develop and integrate end-to-end AI capabilities into CAD flows — including ML-based optimization, predictive modeling, and LLM-assisted automation.
• Define strategy and key initiatives to ensure flows meet future design requirements and advanced technology nodes.
• Regress methodology, analyze results, and develop capabilities that measurably improve quality of results.
• Work closely with design and CAD implementation teams to deliver tools and flows meeting key QoR metrics: Timing, Area, and Performance.

Job description

AMD in Austin, TX is seeking a senior CAD engineer for 3D-IC and advanced packaging design, from RTL to signoff, collaborating with global design teams. You will lead automation efforts, debug large netlists, and partner with Synopsys/Cadence on features and AI co-development. The role emphasizes ML-driven optimization and QoR improvements.

You will contribute to strategy for future nodes, leverage AI in CAD workflows, and work across sites and time zones to deliver robust tools and flows.