Senior ASIC Verification Lead – SV/UVM Expert

Cisco Systems; San Jose (CA); On-site; USD 187,000 - 268,000; Full time

Job summary

Cisco Systems is seeking an ASIC design verification engineer in San Jose, CA to verify ASICs using SystemVerilog and UVM. You will build and maintain complex DV environments, develop test benches, and drive verification closure across simulation, emulation, and bring-up.

The role emphasizes coverage, creative problem solving, and collaboration with cross-functional teams. You will work onsite in San Jose, collaborating with verification engineers, designers, and hardware teams to ensure

Qualifications

• Bachelor's with 8+ years or Master's with 6+ years of relevant experience.
• Experience with SystemVerilog and UVM methodology.
• Experience verifying complex ASIC/SoC blocks, clusters, or top level.
• Experience building test benches from scratch, SystemVerilog constraints, structures and classes.
• Experience with functional coverage and constrained-random DV environments.
• Scripting skills: Perl and/or Python.

Responsibilities

• Maintain and enhance existing DV environments.
• Construct test benches including scoreboard, agents, sequencers, and monitors for new blocks.
• Write test plans, develop test cases, debug regression failures, drive module verification closure.
• Ensure complete verification coverage through code and functional coverage reviews.
• Use AI tools to develop methods to improve verification quality.

Skills

SystemVerilog

UVM

Test benches

Constrained random DV

Perl

Python

Education

Bachelor's degree + 8+ years experience

Master's degree + 6+ years experience

Tools

Veloce/HAPS

Job description

Cisco Systems is seeking an ASIC design verification engineer in San Jose, CA to verify ASICs using SystemVerilog and UVM. You will build and maintain complex DV environments, develop test benches, and drive verification closure across simulation, emulation, and bring-up.

The role emphasizes coverage, creative problem solving, and collaboration with cross-functional teams. You will work onsite in San Jose, collaborating with verification engineers, designers, and hardware teams to ensure