Senior ASIC Verification Engineer — SoC/UVM Expert (Hybrid)

Links Technology Solutions, Inc.; Carlsbad (CA); Hybrid; USD 96,000 - 110,000; Full time

Benefits offered by this job

Health insurance

Life insurance

Vision insurance

Dental insurance

401K Matching

Job summary

Links Technology Solutions, Inc. in Carlsbad, CA onsite/hybrid is seeking an ASIC Verification Engineer with 5-12 years of experience to join our team and contribute to next-generation SoC designs.

You will develop UVM-based verification environments and participate in architectural decisions that impact silicon quality and delivery timelines. Collaboration with architecture, design, and firmware teams will be essential as you create test plans, assertions, scoreboards, and debugging tools to

Qualifications

• Bachelor's degree in Electrical Engineering or a related field.
• Experience with UVM-based testbench development and verification across block to system levels.
• Proficiency in SystemVerilog and familiarity with verification methodologies.
• Experience in ASIC or SoC verification and testplan development.
• Scripting skills with Python or Perl for automation.
• Familiarity with high-speed serial protocols (PCIe/UCIe) and analog debugging.

Responsibilities

• Develop and implement UVM-based verification environments.
• Create comprehensive verification plans at block and system levels.
• Design verification components including assertions, traffic generators, agents, and scoreboards.
• Collaborate with cross-functional teams to evaluate design testability and verification requirements.
• Lead debug efforts and provide solutions for complex technical challenges.

Skills

UVM testbench development

SystemVerilog

Debug complex designs

Python or Perl scripting

Education

Bachelor's degree in Electrical Engineering or related field

Master's degree in Electrical/Communications Engineering or related field

Tools

SystemVerilog

C programming

Python

PCIe/UCIe protocols

Job description

Links Technology Solutions, Inc. in Carlsbad, CA onsite/hybrid is seeking an ASIC Verification Engineer with 5-12 years of experience to join our team and contribute to next-generation SoC designs.

You will develop UVM-based verification environments and participate in architectural decisions that impact silicon quality and delivery timelines. Collaboration with architecture, design, and firmware teams will be essential as you create test plans, assertions, scoreboards, and debugging tools to