TPU ASIC Verification Engineer – AI Hardware

Google Inc.; Sunnyvale (CA); On-site; USD 116,000 - 166,000; Full time

Benefits offered by this job

Equity options

15% bonus target

Comprehensive benefits

Job summary

Google Inc. is seeking an ASIC Design Verification Engineer in Sunnyvale, California, to shape the future of AI/ML hardware acceleration. You will work with cutting‑edge TPU technology, verifying complex designs and ensuring operational excellence in data centers.

This role demands a Bachelor’s degree in relevant fields and at least 1 year of design verification experience. The position offers a competitive salary ranging from $116,000 to $166,000, along with a bonus and benefits.

Qualifications

• 1 year of experience in design verification.
• Experience developing and executing test plans.
• Master’s degree or PhD preferred.

Responsibilities

• Plan verification of complex digital design blocks.
• Create a verification environment using SystemVerilog and UVM.
• Identify and write coverage measures.

Skills

SystemVerilog/Verilog

Problem-solving

Design verification

Education

Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science

Tools

UVM testbenches

Cover analysis tools (e.g., Verdi, Questa)

Job description

Google Inc. is seeking an ASIC Design Verification Engineer in Sunnyvale, California, to shape the future of AI/ML hardware acceleration. You will work with cutting‑edge TPU technology, verifying complex designs and ensuring operational excellence in data centers.

This role demands a Bachelor’s degree in relevant fields and at least 1 year of design verification experience. The position offers a competitive salary ranging from $116,000 to $166,000, along with a bonus and benefits.