Senior ASIC Technical Lead — Silicon Delivery & Validation

Synchron Inc.; San Diego (CA); On-site; USD 180,000 - 220,000; Full time

Benefits offered by this job

Stock options

RSU grants

Job summary

Synchron Inc. is seeking an ASIC Technical Lead in San Diego to own the chip's technical delivery, ensuring the design meets the spec and ships on time.

You’ll gate the program at architecture reviews, pre-tapeout sign-off, and post-silicon disposition, ensuring rigorous verification and defect-free silicon. You will guide external partners, own risk and test plans, and drive escalations to closure across design reviews, bring-up, respin leadership, and roadmap updates for higher channel count

Qualifications

• B.S. or M.S. in Electrical Engineering with silicon design emphasis.
• 5+ years in ASIC/SoC design and development, at least one full cycle from concept to silicon.
• Strong analog or mixed-signal background with ability to critique others’ schematics and sims.

Responsibilities

• Author and maintain versioned requirements and specifications as a single source of truth with the design partner.
• Lead design and architecture reviews at each gate and independently assess schematics, netlists, and simulations.

Skills

ASIC/SoC design

Analog/mixed-signal design

SPICE/Cadence reviews

DFT concepts

External partner collaboration

Education

B.S./M.S. in Electrical Engineering

Tools

Cadence

SPICE

Job description

Synchron Inc. is seeking an ASIC Technical Lead in San Diego to own the chip's technical delivery, ensuring the design meets the spec and ships on time.

You’ll gate the program at architecture reviews, pre-tapeout sign-off, and post-silicon disposition, ensuring rigorous verification and defect-free silicon. You will guide external partners, own risk and test plans, and drive escalations to closure across design reviews, bring-up, respin leadership, and roadmap updates for higher channel count