Senior ASIC/SoC Verification Engineer (RF & PCIe)

Prodapt

Mountain View (CA)

On-site

USD 150,000 - 190,000

Full time

14 days+

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Job summary

Prodapt is seeking an experienced ASIC/SoC Verification Engineer in Mountain View, CA. The role focuses on verifying RF payloads, satellite processors, and high-speed communication systems, using SystemVerilog and UVM in scalable testbenches.

You will debug RTL, verify PCIe Gen3–6, and ensure protocol conformance across IP and SoC levels. Ideal candidates hold a Bachelor’s or Master’s in Electronics, Communications, or VLSI and possess strong scripting (Python/Perl/Tcl) for automation, along

Qualifications

  • Define, develop, and execute comprehensive verification plans at IP and SoC levels.
  • Experience with RF payloads, satellite processors, and communication systems is desired.
  • Strong SystemVerilog/UVM expertise and high-speed protocol verification.

Responsibilities

  • Define, develop, and execute verification strategies for IP and SoC.
  • Architect scalable UVM testbenches for PCIe and DMA sub-systems.
  • Verify PCIe Gen3–6 controller layers, including Physical, Data Link, and Transaction.
  • Develop and verify high-speed protocols ensuring strict spec compliance.
  • Apply UPF/CPF for low-power verification and performance checks.
  • Debug RTL, triage failures, and collaborate with design teams.
  • Set up gate-level simulations with timing annotations when needed.
  • Work on RF payloads, satellite processors, and related comm systems.

Skills

SystemVerilog
UVM
PCIe Gen3-6
DMA
Python
Perl
Tcl
RTL debugging

Education

Bachelor's or Master's in Electronics/Communications/VLSI

Tools

Synopsys VCS
Cadence Xcelium
Siemens Questa

Job description

Prodapt is seeking an experienced ASIC/SoC Verification Engineer in Mountain View, CA. The role focuses on verifying RF payloads, satellite processors, and high-speed communication systems, using SystemVerilog and UVM in scalable testbenches.

You will debug RTL, verify PCIe Gen3–6, and ensure protocol conformance across IP and SoC levels. Ideal candidates hold a Bachelor’s or Master’s in Electronics, Communications, or VLSI and possess strong scripting (Python/Perl/Tcl) for automation, along

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