Senior ASIC/SoC Physical Design Engineer (Onsite)

N2P Systems Inc.; Sunnyvale (CA); On-site; USD 138,000 - 152,000; Full time

Job summary

N2P Systems is seeking an experienced Physical Design Engineer for its Sunnyvale office to drive RTL synthesis, timing optimization, and floorplanning across ASIC/SoC projects. You will collaborate across RTL, design, and verification teams to enhance implementation quality and meet performance targets.

The role requires 10+ years in physical design, strong hands-on RTL experience, and a track record of optimizing power, performance, and area in advanced node technologies.

Qualifications

• Bachelor's or Master's degree in Electrical/Computer Engineering or related field.
• 10+ years of ASIC/SoC physical design experience.
• Hands-on RTL synthesis and timing optimization.
• Floorplanning experience for advanced technology nodes.
• Understanding of netlist optimization and physical implementation methods.

Responsibilities

• Drive RTL synthesis and optimization to meet PPA objectives.
• Perform floorplanning for ASIC/SoC designs.
• Collaborate with RTL and design teams to improve quality and efficiency.
• Analyze synthesized netlists to identify optimization opportunities.
• Support design convergence and timing closure across teams.

Skills

RTL synthesis

Timing optimization

Floorplanning

Netlist optimization

Physical design

Team collaboration

Education

Bachelor's or Master's in Electrical/Computer Engineering

Tools

EDA tools

Job description

N2P Systems is seeking an experienced Physical Design Engineer for its Sunnyvale office to drive RTL synthesis, timing optimization, and floorplanning across ASIC/SoC projects. You will collaborate across RTL, design, and verification teams to enhance implementation quality and meet performance targets.

The role requires 10+ years in physical design, strong hands-on RTL experience, and a track record of optimizing power, performance, and area in advanced node technologies.