Senior ASIC Physical Design Engineer for Space RF/SoC

Amazon; Austin (TX); On-site; USD 159,000 - 215,000; Full time

Benefits offered by this job

Health insurance

Job summary

Amazon Leo seeks a Sr. Physical Design Engineer to drive high-performance ASIC implementations for satellite communications.

You will work with RTL/logic teams to optimize power, performance, and area while leading P&R flow, timing closure, and sign-off across a multi-site environment. The role requires a Bachelor's in Electrical Engineering and 7+ years in ASIC implementation, with preferred Master’s in Electrical/Communications and experience in RF/Mixed-signal integration and UPF flows.

Qualifications

• Bachelor's degree in Electrical Engineering or related field.
• 7+ years of experience in ASIC implementation, including synthesis, STA and working with DFT, P&R for deep sub-micron nodes.

Responsibilities

• Work with RTL/logic designers to drive architectural feasibility studies and power-performance-area tradeoffs for physical design closure.
• Drive IO/Core block physical implementation through synthesis, floor planning, bus/pin planning, place and route, power/clock distribution, congestion analysis, timing closure, IR drop analysis, physical verification, ECO and sign-off.
• Develop physical design methodologies while embracing AI flow.
• Evaluate 3rd party IP and provide recommendations.
• Collaborate with other physical design engineers and RTL/Arch teams to achieve project milestones.

Skills

ASIC implementation

Synthesis

DFT

STA

Place & Route

Education

Bachelor's degree in Electrical Engineering

Master's degree in Electrical or Communications Engineering

Tools

UPF flow

Job description

Amazon Leo seeks a Sr. Physical Design Engineer to drive high-performance ASIC implementations for satellite communications.

You will work with RTL/logic teams to optimize power, performance, and area while leading P&R flow, timing closure, and sign-off across a multi-site environment. The role requires a Bachelor's in Electrical Engineering and 7+ years in ASIC implementation, with preferred Master’s in Electrical/Communications and experience in RF/Mixed-signal integration and UPF flows.