ASIC Engineer - Satellite SoC & RTL Design Expert

Amazon; Austin (TX); On-site; USD 110,000 - 160,000; Full time

Job summary

Amazon Leo seeks an ASIC Engineer to contribute to the design, verification and optimization of a high-performance SoC family for satellite connectivity. You will work with cross-disciplinary teams and partners to translate requirements into robust silicon, from concept through production, with opportunities for travel.

Ideal candidates have strong RTL/SystemVerilog skills, C/C++ experience, and a track record delivering optimized ASICs with power, performance and area trade-offs.

Qualifications

• Bachelor's degree in Electrical Engineering, Computer Engineering, or related field.
• Experience troubleshooting and debugging technical systems with strong analytical skills.
• Experience in RTL coding and debug, and performance/power/area analysis.
• Experience in C/C++ and SystemVerilog coding.
• Experience working with physical design teams to develop optimized ASICs.
• Experience with modern ASIC/FPGA design and verification tools.

Responsibilities

• Participate in logic design, verification and post-silicon validation as part of Amazon custom silicon solutions.
• Work with physical design teams to achieve performance and area requirements.
• Develop an understanding of end customer requirements and SoC architecture.
• Develop and execute design automation mechanisms and flows.

Skills

C/C++

SystemVerilog

RTL design

ASIC/FPGA design

Debugging

Digital design

Education

Bachelor's degree in Electrical Engineering or Computer Engineering

Tools

ASIC/FPGA design tools

Job description

Amazon Leo seeks an ASIC Engineer to contribute to the design, verification and optimization of a high-performance SoC family for satellite connectivity. You will work with cross-disciplinary teams and partners to translate requirements into robust silicon, from concept through production, with opportunities for travel.

Ideal candidates have strong RTL/SystemVerilog skills, C/C++ experience, and a track record delivering optimized ASICs with power, performance and area trade-offs.