Senior ASIC Design Engineer, Space Wireless SOCs

Amazon

San Diego (CA)

On-site

USD 159,000 - 215,000

Full time

11 days ago

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Job summary

Amazon Technologies, Inc. in San Diego seeks a seasoned digital design engineer to define SOCs for communications via Low Earth Orbit satellites and Amazon gateways. You will drive architecture from system spec to RTL and optimize timing, power, and chip-level validation.

The role requires 7+ years in digital design, experience with volume production, and low-power techniques. You will work with UVM and Matlab in a collaborative, space-oriented environment to deliver high-performance silicon

Qualifications

  • Bachelor's degree in Electrical Engineering or related field.
  • 7+ years of experience in digital design, preferably in communication systems.
  • Experience with products that have gone to volume production.
  • Experience in low power design techniques.

Responsibilities

  • Implement wireless system architecture in silicon from system specification to RTL and chip level validation.
  • Develop solutions that optimize throughput, latency, and availability within power and cost constraints.
  • Drive high-quality designs for first-time silicon success and target power objectives.
  • Create standalone verification test benches to verify your block.
  • Collaborate with the verification team and participate in System-level verification using UVM/System C/DPI-C.
  • Ensure blocks meet DFT, timing, and power targets with the implementation team.
  • Learn requirements for systems operating in space and perform trade-off analyses.

Skills

Digital design
Low power design
Strong communication

Education

Bachelor's degree in Electrical Engineering

Tools

UVM
Matlab
Formal verification

Job description

Amazon Technologies, Inc. in San Diego seeks a seasoned digital design engineer to define SOCs for communications via Low Earth Orbit satellites and Amazon gateways. You will drive architecture from system spec to RTL and optimize timing, power, and chip-level validation.

The role requires 7+ years in digital design, experience with volume production, and low-power techniques. You will work with UVM and Matlab in a collaborative, space-oriented environment to deliver high-performance silicon

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