Senior ASIC Physical Design Architect (RF/CMOS)

Amazon Kuiper Manufacturing Enterprises LLC; Austin (TX); On-site; USD 185,000 - 250,000; Full time

Benefits offered by this job

Health insurance

401(k) matching

Paid time off

Job summary

Amazon Leo is seeking a senior ASIC physical design engineer to help define and implement SOCs for satellites and gateways. You will collaborate with RTL/Arch teams to drive feasibility studies, tradeoffs, and power-performance analyses for physical design closure.

Qualified candidates have 7+ years in ASIC implementation (synthesis, STA, DFT, P&R) and a background in RF/Analog/Mixed signal blocks integration with digital top flows, plus UPF familiarity.

Qualifications

• Bachelor's degree in Electrical Engineering or related field.
• 7+ years of experience in ASIC implementation (synthesis, STA, DFT, P&R).

Responsibilities

• Work with RTL/logic designers to assess feasibility and tradeoffs for physical design closure.
• Drive IO/Core block physical implementation through synthesis, floorplanning, P&R, and timing closure.
• Develop physical design methodologies while embracing AI flow.
• Evaluate 3rd party IP and provide recommendations.
• Collaborate across multi-site teams and with RTL/Arch groups.

Skills

ASIC implementation

Synthesis

Place & Route

DFT/STA

Education

Bachelor's degree in Electrical Engineering

Master's degree in Electrical or Communications Engineering

Tools

UPF flow

RF/Analog/Mixed signal integration

AI/ML workflows

Job description

Amazon Leo is seeking a senior ASIC physical design engineer to help define and implement SOCs for satellites and gateways. You will collaborate with RTL/Arch teams to drive feasibility studies, tradeoffs, and power-performance analyses for physical design closure.

Qualified candidates have 7+ years in ASIC implementation (synthesis, STA, DFT, P&R) and a background in RF/Analog/Mixed signal blocks integration with digital top flows, plus UPF familiarity.