Senior ASIC Performance Architect & Modeling Lead

Meta; Jackson (MS); On-site; USD 178,000 - 250,000; Full time

Job summary

Meta's Silicon Engineering organization is building custom silicon solutions powering AI and data center workloads. As an ASIC Engineer focusing on performance architecture and modeling, you will define modeling strategies, drive microarchitectural exploration, and develop pre-silicon models aligned with high-throughput, low-latency targets for hyperscale infrastructure.

You will collaborate with architecture, RTL, and software teams to ensure silicon meets throughput and efficiency goals,

Qualifications

• Bachelor's degree or equivalent practical experience in CS/CE.
• 8+ years in ASIC design, silicon engineering, or related field.
• 5+ years in ASIC performance modeling, microarchitectural analysis, or pre-silicon simulation for custom silicon/SoC designs.
• Proficiency in C++ and Python for developing simulation models, automation frameworks, and performance analysis tools.
• Experience developing cycle-accurate or transaction-level performance models using C++ and SystemC.
• Experience with performance analysis of data center/AI accelerator workloads on custom silicon.
• Experience defining microarchitectural specifications and cross-functional alignment.
• Experience with assembly programming languages and compiler technologies.

Responsibilities

• Define and own the performance modeling strategy for custom infrastructure ASICs.
• Drive microarchitectural exploration across compute, memory, interconnect, and I/O domains.
• Develop and validate pre-silicon performance models that predict post-silicon behavior.
• Develop workloads and kernels for ML training and inference.
• Establish performance analysis methodologies, benchmarking frameworks, and bottleneck detection.
• Collaborate with architecture, RTL, and physical design to translate requirements into specs.
• Partner with software teams to optimize workloads against silicon performance.
• Lead cross-functional reviews and communicate results to leadership.
• Define long-term performance modeling roadmaps, tooling, and automation.
• Mentor engineers on modeling techniques and analysis best practices.
• Identify and resolve gaps between modeled and measured silicon behavior.

Skills

C++

Python

Cycle-accurate modeling

Microarchitectural analysis

Pre-silicon simulation

Performance analysis

SystemC

Assembly languages

Compiler technologies

Education

Bachelor's degree in Computer Science/Computer Engineering or equivalent practical experience

Tools

SystemC

SystemVerilog

Python automation pipelines

Job description

Meta's Silicon Engineering organization is building custom silicon solutions powering AI and data center workloads. As an ASIC Engineer focusing on performance architecture and modeling, you will define modeling strategies, drive microarchitectural exploration, and develop pre-silicon models aligned with high-throughput, low-latency targets for hyperscale infrastructure.

You will collaborate with architecture, RTL, and software teams to ensure silicon meets throughput and efficiency goals,