Senior ASIC Performance Architect & Modeling

Meta; Santa Fe (NM); On-site; USD 178,000 - 250,000; Full time

Job summary

Meta's Silicon Engineering organization seeks an ASIC Engineer specializing in performance and modeling to define and drive architectural performance analysis and pre-silicon modeling for custom ASICs powering Meta's AI infrastructure.

You will establish modeling methodologies, work with architecture, RTL, and software teams, and lead roadmaps for simulation platforms at hyperscale. Strong C++/Python, SystemC, and HDL experience are expected.

Qualifications

• Bachelor's degree or equivalent practical experience in CS/CE or related field.
• 8+ years in ASIC design, silicon engineering, or related field.
• 5+ years in ASIC performance modeling, microarchitectural analysis, or pre-silicon simulation.
• Proficiency in C++ and Python for simulation models and tooling.
• Experience with cycle-accurate or transaction-level models in complex digital systems.

Responsibilities

• Define and own the performance modeling strategy for custom infrastructure ASICs, including cycle-accurate and transaction-level simulations
• Drive microarchitectural exploration and trade-off analysis across compute, memory, interconnect, and I/O to inform silicon architecture
• Develop and validate pre-silicon models predicting post-silicon behavior for data center workloads
• Create low-level workloads/kernels for ML training and inference applications
• Establish performance analysis methodologies, benchmarking, and bottleneck identification across the ASIC pipeline
• Collaborate with architecture, RTL, and physical design to translate performance requirements into specs
• Partner with software teams to co-optimize workload scheduling, firmware, and driver behavior
• Lead cross-functional technical reviews and communicate results to leadership
• Define long-term performance modeling roadmaps, tooling, automation, and simulation platforms
• Mentor engineers on modeling techniques and best practices
• Identify and resolve gaps between modeled and measured silicon behavior through root cause analysis

Skills

C++

Python

assembly programming

compiler technologies

GPU/ML programming

multithreaded programming

Education

Bachelor's degree in Computer Science or related field

Tools

SystemC

SystemVerilog

VHDL

Job description

Meta's Silicon Engineering organization seeks an ASIC Engineer specializing in performance and modeling to define and drive architectural performance analysis and pre-silicon modeling for custom ASICs powering Meta's AI infrastructure.

You will establish modeling methodologies, work with architecture, RTL, and software teams, and lead roadmaps for simulation platforms at hyperscale. Strong C++/Python, SystemC, and HDL experience are expected.