Senior ASIC Package Engineer: Board-Attach & Yield Expert

Meta; Sunnyvale, Austin (CA, TX); On-site; USD 180,000 - 260,000; Full time

Job summary

Meta is seeking an experienced ASIC Package Engineer to own package-to-board attach processes for its AI/ML and networking silicon. You will lead development, qualification, and optimization of packaging interfaces, collaborating with PQE, SQE, and module design teams to deliver robust, high-yield manufacturing flows for data-center hardware.

Applicants should have 8+ years in semiconductor packaging, with strong experience in solder paste printing, reflow soldering, inspection, and DOE-based

Qualifications

• 8+ years of experience in semiconductor packaging with direct ownership of package-to-board assembly and reliability.
• Experience with package board technology processes including solder paste printing, pick-and-place, reflow soldering, and inspection methods.
• Experience working with package assembly and ODM suppliers and driving process qualification and yield improvement programs.
• Experience with failure analysis techniques for solder joint reliability and package-board interaction-related defects.
• Experience collaborating with quality engineering teams (PQE/SQE) to establish process controls and qualification requirements.

Responsibilities

• Lead development and optimization of package-to-board attach processes.
• Coordinate with Product Quality Engineering (PQE) and Supplier Quality Engineering (SQE) and design teams to establish qualified, high-yield packaging.
• Drive process qualification, DOE studies, and yield improvements across packaging technologies.

Skills

ASIC packaging

Package-to-board interaction

Statistical process control

Design of Experiments

Solder alloy selection

Thermo-mechanical analysis

AI/HPC hardware experience

Education

Bachelor's degree in Computer Science/Computer Engineering

Master's degree in Materials Science/Mechanical Engineering/Electrical Engineering

PhD in Materials Science/Mechanical Engineering or related

Tools

SPI inspection systems

AOI

X-ray inspection

Reflow soldering

Job description

Meta is seeking an experienced ASIC Package Engineer to own package-to-board attach processes for its AI/ML and networking silicon. You will lead development, qualification, and optimization of packaging interfaces, collaborating with PQE, SQE, and module design teams to deliver robust, high-yield manufacturing flows for data-center hardware.

Applicants should have 8+ years in semiconductor packaging, with strong experience in solder paste printing, reflow soldering, inspection, and DOE-based