Senior ASIC Formal Verification Engineer — SoC/IP | Equity

Meta; Austin (TX); On-site; USD 178,000 - 250,000; Full time

Job summary

Meta in Austin, Texas is hiring an ASIC Formal Verification Engineer within the Infrastructure org to build IP/SoC for data center applications. You will develop formal testplans and sign-off complex blocks, collaborating with cross-functional teams across verification, design and software.

The role emphasizes leadership in formal methods, scalable environments, and evaluation of EDA tools, with opportunities to mentor engineers and drive first-pass silicon success.

Qualifications

• Bachelor's degree in CS/CE or equivalent practical experience
• 8+ years of experience in Design Verification
• 5+ years of experience in Formal Verification
• Experience with Formal Verification applications including Datapath, sequential equivalence, Xprop, Clock Gating, connectivity etc
• Proven understanding of Formal Verification methodologies, complexity reduction techniques and abstraction techniques
• Proven analytical skills to craft novel solutions to tackle industry-level complex designs
• Experience collaborating with cross-functional teams such as design, architecture, and software to deliver verification milestones
• Fluency in SystemVerilog/SVA
• Proficiency in scripting languages such as Python, Perl, or Tcl
• Experience with JasperGold or VC-Formal

Responsibilities

• Provide technical leadership in Formal Verification
• Propose, implement and evangelize the Formal Verification Methodology across the group
• Work with Architecture and Design team to formalize specifications and implementations
• Define formal verification scope, create formal environments and close coverage with targeted techniques
• Build reusable/scalable environments for Formal Verification and tooling deployment
• Evaluate and recommend EDA solutions for Formal Verification
• Provide training for internal teams and mentoring engineers in Formal Verification technology

Skills

Formal Verification

SystemVerilog/SVA

Python/Perl/Tcl

Education

Bachelor's degree in Computer Science/Computer Engineering

Tools

JasperGold

VC-Formal

Job description

Meta in Austin, Texas is hiring an ASIC Formal Verification Engineer within the Infrastructure org to build IP/SoC for data center applications. You will develop formal testplans and sign-off complex blocks, collaborating with cross-functional teams across verification, design and software.

The role emphasizes leadership in formal methods, scalable environments, and evaluation of EDA tools, with opportunities to mentor engineers and drive first-pass silicon success.