Pre-Silicon ASIC Formal Verification Engineer

Annapurna Labs; Austin (TX); On-site; USD 104,000 - 128,000; Full time

Job summary

Annapurna Labs (U.S.) Inc. in Austin, TX seeks a hardware verification engineer to define and check critical hardware module specifications using formal methods within the AWS hardware organization. You will work with Verilog/SystemVerilog and model checkers to prove designs meet specifications.

Join a world-class pre-silicon design team focusing on rigorous proofs, automation, and collaboration, contributing to machine learning and FPGA acceleration initiatives in a large-scale environment.

Qualifications

• Bachelor or Masters degree in a relevant field.
• Experience with formal methods or hardware verification.
• Familiarity with Verilog/SystemVerilog and hardware design verification methods.

Responsibilities

• Define and check specifications of critical hardware modules using formal methods and model checkers.
• Work as part of a pre-silicon hardware design team to ensure correct behavior and formal verification of blocks.

Skills

Hardware verification

Formal methods

Verilog/SystemVerilog

Scripting (Python/TCL)

Communication

Problem solving

Education

Bachelor’s or Master’s degree

Tools

JasperGold

VC Formal

RTL Verilog

Job description

Annapurna Labs (U.S.) Inc. in Austin, TX seeks a hardware verification engineer to define and check critical hardware module specifications using formal methods within the AWS hardware organization. You will work with Verilog/SystemVerilog and model checkers to prove designs meet specifications.

Join a world-class pre-silicon design team focusing on rigorous proofs, automation, and collaboration, contributing to machine learning and FPGA acceleration initiatives in a large-scale environment.