Lead Emulation Architect — Pre-Silicon AI Chiplet Platform

TylSemi, Inc.; San Jose (CA); Hybrid; USD 238,000 - 286,000; Full time

Job summary

TylSemi, Inc. in San Jose, CA is seeking an Emulation Lead/Principal Engineer to build scalable pre-silicon environments.

You will enable firmware, software and system validation months before first silicon arrives, boot real software, run workloads and expose bottlenecks to accelerate product readiness. You will architect multi-die emulation platforms using Palladium, ZeBu and Veloce, drive pre-silicon bring-up, and lead cross-functional verification and debugging efforts across RTL, firmware

Qualifications

• 10+ years of ASIC/SoC development with emulation ownership.
• Experience with Palladium, ZeBu or Veloce emulation platforms.
• Strong RTL skills in Verilog/SystemVerilog.
• Firmware bring-up, embedded processors, interrupts and system debug.
• Proficiency in C/C++ and Python.
• Excellent cross-functional debugging and technical leadership.
• Proven track record leading complex verification and emulation programs.

Responsibilities

• Architect and deploy full-chip, multi-die and subsystem emulation environments using Palladium, ZeBu, Veloce or similar platforms.
• Enable pre-silicon bring-up of boot ROM, firmware, drivers, operating systems and workloads.
• Develop scalable emulation methodologies and reusable infrastructure; drive system validation, performance analysis and root-cause debug.
• Build automation, CI/CD workflows, regressions and release processes that scale across engineering teams.
• Partner with architecture, design, verification, firmware, DFT and post-silicon teams to reduce product risk before tapeout.
• Influence methodology, observability, debugability and overall silicon readiness.
• Lead complex debug spanning RTL, firmware, software and hardware platforms.
• Mentor engineers and influence architecture to improve observability and product quality.

Skills

Verilog/SystemVerilog

C/C++

Python

Firmware bring-up

Debugging

Technical leadership

Tools

Palladium

ZeBu

Veloce

Job description

TylSemi, Inc. in San Jose, CA is seeking an Emulation Lead/Principal Engineer to build scalable pre-silicon environments.

You will enable firmware, software and system validation months before first silicon arrives, boot real software, run workloads and expose bottlenecks to accelerate product readiness. You will architect multi-die emulation platforms using Palladium, ZeBu and Veloce, drive pre-silicon bring-up, and lead cross-functional verification and debugging efforts across RTL, firmware