Senior ASIC Emulation Engineer - Lead Silicon Innovation

K2 Space Corporation; Seattle (WA); On-site; USD 170,000 - 250,000; Full time

Benefits offered by this job

Equity in the company

Medical/dental/vision coverage

Paid time off

Parental leave

Job summary

K2 Space is seeking a Senior ASIC Emulation Engineer to lead bring‑up, deployment, and optimization of pre‑silicon emulation platforms. You will work with architecture, RTL, DV, firmware, and silicon teams to enable high‑fidelity hardware/software co‑development and accelerate verification cycles.

This is a hands‑on role with significant ownership and impact. You will define emulation strategy, optimize designs for performance, and drive integration across DV, firmware, and design teams, shaping

Qualifications

• B.S./M.S. in EE/CE or related field.
• 5+ years in ASIC/SoC development focusing on emulation.
• Strong SystemVerilog, DV methodologies, RTL flows, and lifecycle knowledge.

Responsibilities

• Build, integrate, and maintain full‑chip, multi‑chip emulation models.
• Define emulation strategy, workflow, and cross‑team coordination.
• Collaborate with RTL, DV, firmware, physical design for emulation optimization.
• Develop transactors, BFMs, adapters, and virtualization interfaces.
• Support system‑level testing and end‑to‑end workloads in emulation.
• Triage issues, root‑cause analysis, and cross‑functional debugging.

Skills

SystemVerilog

Digital logic

RTL design

DV methodologies

ASIC lifecycle

Python

Perl

TCL

C/C++ system-level testing

APB/AHB/AXI

Education

B.S. or M.S. in Electrical Engineering, Computer Engineering, or related field

Tools

Palladium

ZeBu

Veloce

Job description

K2 Space is seeking a Senior ASIC Emulation Engineer to lead bring‑up, deployment, and optimization of pre‑silicon emulation platforms. You will work with architecture, RTL, DV, firmware, and silicon teams to enable high‑fidelity hardware/software co‑development and accelerate verification cycles.

This is a hands‑on role with significant ownership and impact. You will define emulation strategy, optimize designs for performance, and drive integration across DV, firmware, and design teams, shaping