Senior ASIC Digital Design Lead & Verification Engineer

Synopsys Inc; Austin (TX); On-site; USD 150,000 - 210,000; Full time

Benefits offered by this job

Health benefits

Professional development

Competitive 401(k)

Job summary

Synopsys Inc. is seeking an experienced ASIC Design and Verification Engineer in Austin, TX to lead the design and verification of complex ASIC blocks and systems.

You will collaborate with analog, physical design, and applications teams to ensure seamless integration and performance goals. The role requires 8+ years in ASIC digital design, strong RTL expertise, and hands-on experience with industry-standard EDA tools.

Qualifications

• 8+ years of experience in ASIC digital design and verification.
• Strong RTL design and verification expertise.
• Proficiency with industry-standard EDA tools and methodologies.

Responsibilities

• Lead the design and verification of complex ASIC blocks and systems.
• Collaborate with analog, physical design, and applications engineering teams for seamless integration.
• Develop and execute comprehensive test plans to verify functionality and performance.
• Utilize advanced EDA tools to optimize design performance and power efficiency.

Skills

RTL design

ASIC verification

EDA tools

IP integration

Education

BSEE/MSEE

Tools

EDA tools

PCIe/CXL/DDR/Ethernet IP

Job description

Synopsys Inc. is seeking an experienced ASIC Design and Verification Engineer in Austin, TX to lead the design and verification of complex ASIC blocks and systems.

You will collaborate with analog, physical design, and applications teams to ensure seamless integration and performance goals. The role requires 8+ years in ASIC digital design, strong RTL expertise, and hands-on experience with industry-standard EDA tools.