Senior ASIC Digital Design Lead – High-Performance SoCs

Synopsys, Inc.; Austin (TX); On-site; USD 140,000 - 210,000; Full time

Benefits offered by this job

Health benefits

Professional development

Mentorship program

Job summary

Synopsys, Inc. is seeking an experienced ASIC Design and Verification engineer in Austin, TX. You will lead design and verification of complex ASIC blocks, collaborating with analog and physical design teams to ensure integration and performance goals are met.

You will develop and execute test plans, leveraging advanced EDA tools to optimize power and performance while addressing challenging design problems. A strong RTL background with 8+ years of experience is required.

Qualifications

• BSEE or MSEE degree with 8+ years in ASIC digital design and verification.
• Strong hands-on RTL design experience and ASIC verification proficiency.
• Familiarity with high-performance IP and standard interfaces.

Responsibilities

• Lead the design and verification of complex ASIC blocks and systems, ensuring specifications and performance goals are met.
• Collaborate with analog, physical design, and applications engineering for seamless integration.
• Develop and execute comprehensive test plans to verify functionality and performance.
• Utilize advanced EDA tools and methodologies to optimize design performance and power efficiency.

Skills

RTL design

Verification

ASIC design

EDA tools

Communication

Education

BSEE/MSEE

Tools

EDA tool suites

Job description

Synopsys, Inc. is seeking an experienced ASIC Design and Verification engineer in Austin, TX. You will lead design and verification of complex ASIC blocks, collaborating with analog and physical design teams to ensure integration and performance goals are met.

You will develop and execute test plans, leveraging advanced EDA tools to optimize power and performance while addressing challenging design problems. A strong RTL background with 8+ years of experience is required.