Senior ASIC DFT Architect for SoC Test

Blue Origin; United States; Remote; USD 269,000 - 377,000; Full time

Benefits offered by this job

Stock options

401(k) match up to 5%

Paid time off

Parental leave

Job summary

Blue Origin is seeking a Principal ASIC DFT Designer to lead test strategy for a large multi-block SOC program (TeraWave). You will own DFT architecture, implement scan/compression, and deliver vectors for silicon bring up and production test, coordinating with design, PD, and verification teams.

This senior IC role requires 10+ years of DFT experience, strong expertise in ATPG, boundary scan, and test infrastructure. Relocation and US citizenship/permanent resident status may apply per policy.

Qualifications

• Bachelor’s degree in Electrical or Computer Engineering or related field.
• Minimum 10 years of experience in design for test for complex digital SOCs.
• Experience defining DFT architecture and specifications for large multi-block SOC designs.
• Experience with DC and AC scan design and memory BIST implementation.
• Experience generating ATPG patterns for automated test equipment and debugging ATE patterns.

Responsibilities

• Define DFT architecture and test strategy for large multi-block multi-block SOC designs.
• Author DFT specifications covering scan, compression, boundary scan, and test access mechanisms.
• Implement scan chain insertion, test clock control, and on-chip compression logic.
• Design memory and logic BIST for embedded memories and logic.
• Generate and validate DFT vectors for silicon bring up and production test programs.
• Debug ATE pattern failures and coordinate with design and product teams.
• Support defect analysis and yield improvement using test data.
• Review test coverage and DFT timing with PD and verification teams.

Skills

DFT architecture

ATPG patterns

DC/AC scan design

test vector bring up

defect/yield analysis

Education

Bachelor’s degree in Electrical/Computer Engineering

Master’s degree (preferred)

Tools

Tessent

DFTMAX

Modus

Job description

Blue Origin is seeking a Principal ASIC DFT Designer to lead test strategy for a large multi-block SOC program (TeraWave). You will own DFT architecture, implement scan/compression, and deliver vectors for silicon bring up and production test, coordinating with design, PD, and verification teams.

This senior IC role requires 10+ years of DFT experience, strong expertise in ATPG, boundary scan, and test infrastructure. Relocation and US citizenship/permanent resident status may apply per policy.