Senior ASIC DFT Architect for SOC Test and Validation

Blue Origin; Cupertino (CA); On-site; USD 269,000 - 377,000; Full time

Benefits offered by this job

Medical, dental, vision insurance

401(k) with company match

Education Support Program

Stock options for regular employees

Job summary

Blue Origin is seeking a Principal ASIC DFT Designer to own test architecture for the TeraWave SOC program. You will define the DFT strategy for large multi-block designs, implement scan, compression, and built-in self-test infrastructure, and deliver vectors for silicon bring-up and production testing.

This senior IC engineering role combines technical leadership with hands-on design work, includes coordinating with product and physical design teams, debugging ATE patterns, and supporting

Qualifications

• Bachelor's degree required in EE/CE or related field.

Responsibilities

• Define DFT architecture and test strategy for large multi-block SOC designs.

Skills

DFT architecture

ATPG pattern generation

Scan design

Built-in test (BIST)

Test vector delivery

Education

Bachelor's degree in Electrical Engineering, Computer Engineering, or related technical field

Master's degree in Electrical Engineering, Computer Engineering, or related technical field

Tools

Tessent

DFTMAX

Modus

IEEE 1500

IEEE 1687

Job description

Blue Origin is seeking a Principal ASIC DFT Designer to own test architecture for the TeraWave SOC program. You will define the DFT strategy for large multi-block designs, implement scan, compression, and built-in self-test infrastructure, and deliver vectors for silicon bring-up and production testing.

This senior IC engineering role combines technical leadership with hands-on design work, includes coordinating with product and physical design teams, debugging ATE patterns, and supporting