Senior ASIC Designer: Ethernet Switching & High-Speed I/O

Anysilicon; Santa Clara (CA); Hybrid; USD 170,000 - 210,000; Full time

Job summary

Advanced Micro Devices, Inc in Santa Clara, CA is seeking an SR ASIC Design Engineer for Ethernet Switch & High-Speed I/O. You will contribute to ASIC design for high-performance network chips and collaborate with architecture, IP, and physical design teams to ensure first-pass silicon success.

The role covers front-end RTL design, Ethernet subsystem integration, switch fabric and buffer/queue systems, and post-silicon yield learning.

Qualifications

• Bachelor's or Master's degree in Computer Engineering or Electrical Engineering.
• Knowledge of Ethernet protocols and switch design.
• Experience with high-speed I/O (SerDes) architectures and verification.

Responsibilities

• Contribute to ASIC design for high-performance network chips, specifically AINIC and DPU.
• Engage in Ethernet subsystem design and integration.
• Design and implement switch fabric, buffer, and queue systems.
• Front-end RTL design and integration of high-speed I/O subsystems.
• Collaborate with architecture, IP, and physical design teams for silicon success.
• Support post-silicon bring-up and yield learning.

Skills

Ethernet protocols

Switch design

Buffer/Queue management

SerDes / high-speed I/O

Scripting (Python/Perl/Shell)

SystemVerilog/Verilog RTL design

Education

Bachelor's or Master's degree in Computer Engineering or Electrical Engineering

Tools

VCS

Verilog/SystemVerilog RTL

Job description

Advanced Micro Devices, Inc in Santa Clara, CA is seeking an SR ASIC Design Engineer for Ethernet Switch & High-Speed I/O. You will contribute to ASIC design for high-performance network chips and collaborate with architecture, IP, and physical design teams to ensure first-pass silicon success.

The role covers front-end RTL design, Ethernet subsystem integration, switch fabric and buffer/queue systems, and post-silicon yield learning.