Senior ASIC Design Engineer - NoC & AXI Interconnect

Advanced Micro Devices; Santa Clara (CA); On-site; USD 100,000 - 140,000; Full time

Job summary

Advanced Micro Devices in Santa Clara is seeking an ASIC Design Engineer to contribute to high-performance network chip designs. You will collaborate with architecture and design teams, focusing on Network-on-Chip integration and ensuring first pass silicon success.

The ideal candidate holds a Bachelor's or Master's in Computer Engineering and possesses skills in VCS simulation and various design protocols. A detail-oriented approach with good communication is essential. Benefits are included as part of the role.

Qualifications

• Experience with Network-on-Chip architecture, protocols, and design.
• Experience with AXI, ACE, and APB interface design and verification.
• Knowledge of queuing system design and buffer management.

Responsibilities

• Contribute to ASIC chip design for high-performance network chips.
• Design and integration of Network-on-Chip (NoC).
• Collaboration with architecture, IP, and physical design teams.

Skills

Network-on-Chip design

AXI interface design

Good communication skills

Problem-solving skills

Education

Bachelor's or Master's degree in Computer Engineering/Electrical Engineering

Tools

VCS simulation tool

Perl

Python

Shell scripting

SystemVerilog/Verilog RTL design

Job description

Advanced Micro Devices in Santa Clara is seeking an ASIC Design Engineer to contribute to high-performance network chip designs. You will collaborate with architecture and design teams, focusing on Network-on-Chip integration and ensuring first pass silicon success.

The ideal candidate holds a Bachelor's or Master's in Computer Engineering and possesses skills in VCS simulation and various design protocols. A detail-oriented approach with good communication is essential. Benefits are included as part of the role.