Senior ASIC Analog Layout Architect – High-Speed Optics

Cisco; Carlsbad (CA); On-site; USD 149,000 - 218,000; Full time

Job summary

Cisco is seeking a Senior Layout Engineer for the Silicon One Optics team to architect the physical blueprint for high-speed interconnects and own block-to-top integration from floorplanning to tapeout.

You will tackle complex parasitic, SI, and thermal challenges, collaborate with CAD, circuit, and packaging teams, and mentor rising talent while shaping design methodologies for next-gen optical solutions.

Qualifications

• Bachelor’s or advanced degree with related experience in ASIC/SoC layout.
• Experience supporting block-level layout through tapeout.
• Background in physical verification and custom analog layout in advanced nodes.

Responsibilities

• Own block-to-top integration for 100G/200G/400G lambda architectures.
• Lead floorplanning, post-layout extraction, sign-off, and tapeout.
• Address parasitic, signal integrity, and thermal tradeoffs with CAD teams.
• Mentor engineers and shape design methodologies across the group.

Skills

Block-level layout experience

Cross-functional collaboration

Signal integrity optimization

Education

Bachelor's degree in Electrical Engineering or related field

Master's degree in Electrical Engineering or related field

PhD in Electrical Engineering or related field

Tools

Cadence Virtuoso

Calibre

Python

Perl

TCL

Job description

Cisco is seeking a Senior Layout Engineer for the Silicon One Optics team to architect the physical blueprint for high-speed interconnects and own block-to-top integration from floorplanning to tapeout.

You will tackle complex parasitic, SI, and thermal challenges, collaborate with CAD, circuit, and packaging teams, and mentor rising talent while shaping design methodologies for next-gen optical solutions.