Senior Analog & SRAM Design Engineer

Microchip Technology Inc.; San Jose (CA); On-site; USD 91,000 - 232,000; Full time

Benefits offered by this job

Health benefits from day one

Retirement savings plans

ESPP program with 2 year look back

Job summary

Microchip Technology Inc. is seeking a Technical Staff Engineer – Analog Design (SRAM Design) based in San Jose, California.

You will lead the design of complex SRAM blocks with multiple features, collaborating with ASIC, firmware, verification, and test teams to deliver high-performance FPGA solutions. The role requires 12+ years in memory circuit design, strong SPICE and Verilog skills, and the ability to optimize for speed, power, and area.

Qualifications

• Bachelor's degree in Computer Engineering, Electrical Engineering, or Computer Science
• 12+ years of experience in custom SRAM design and/or memory circuit design
• High degree of SPICE simulation proficiency
• Adept at leveraging full custom design EDA tool set
• Demonstrated competency in scripting, managing simulation queues, data capture and analysis
• Proficient in simulating and analyzing yield impact, reliability, and power
• Ability to support layout, verification, timing characterization, and software model developers
• Ability to develop and test Verilog simulation model and compare back to SPICE based model
• Excellent analytical, communication (written and verbal), and documentation skills
• Self-motivated and proactive team player
• Attention to detail and ability to drive tasks to completion independently in timely manner

Responsibilities

• Define, estimate, develop, and optimize full custom high speed SRAM block for speed, low power, area, and feature set
• Estimate speed and power for various memory configurations and memory cell types
• Define internal memory array architecture for redundancy, ECC compliance, and optimal speed with lowest power
• Analyze projected SRAM yield per device versus redundancy requirements
• Run experiments using memory compilers from EDA vendors for embedded memories to evaluate PPA trade-offs of device mix
• Creation and verification of circuit schematics and functional Verilog models
• Simulate and evaluate SRAM cell for cell stability, write and read margin, minimum cell operating and state retention supply level, and noise margin
• Simulate and analyze critical paths and all features and functions
• Optimize memory array and non-array logic transistor sizes and Vt selection for lowest possible dynamic and standby power
• Develop and optimize sense amps for reliable operation, high speed, low power, and sufficient noise margin
• Design testability circuitry and define SRAM test requirements
• Write technical specifications and participate in formal reviews of other block specifications
• Contribute to datasheet development through block characterization
• Engage in design and verification of other circuit blocks outside of SRAM
• Support verification and timing characterization teams
• Drive and participate in silicon validation of SRAM blocks for functionality and performance

Job description

Microchip Technology Inc. is seeking a Technical Staff Engineer – Analog Design (SRAM Design) based in San Jose, California.

You will lead the design of complex SRAM blocks with multiple features, collaborating with ASIC, firmware, verification, and test teams to deliver high-performance FPGA solutions. The role requires 12+ years in memory circuit design, strong SPICE and Verilog skills, and the ability to optimize for speed, power, and area.