Senior Analog Layout Lead for High-Performance Silicon

Meta; Burlingame (CA); On-site; USD 178,000 - 250,000; Full time

Job summary

Meta's Silicon Engineering organization seeks an experienced Analog Layout Lead to drive the physical implementation of complex analog and mixed-signal circuits for custom chips powering VR/AR wearables. You will own full-custom layout, define methodologies, and collaborate with circuit design and verification to meet aggressive power, performance, and area targets.

You will lead layout of PLLs, ADCs, DACs, LDOs, and high-speed I/O, establish floorplans, mentor engineers, and drive DRC/LVS and

Qualifications

• Bachelor's degree in Electrical Engineering or related field.
• 8+ years of experience in full-custom analog and mixed-signal layout for production silicon.
• Experience with Cadence Virtuoso for schematic-driven layout, parasitic extraction, and verification.

Responsibilities

• Lead full-custom layout of complex analog and mixed-signal blocks for VR/AR wearable platforms.
• Define and enforce analog layout methodologies and best practices across the team.
• Drive parasitic-aware layout strategies to meet noise, matching, and signal integrity requirements.

Skills

Analog/mixed-signal design

Leadership

Mentoring

Cross-functional collaboration

Education

Bachelor's degree in Electrical Engineering or related field

Tools

Cadence Virtuoso

Spectre

Calibre

Job description

Meta's Silicon Engineering organization seeks an experienced Analog Layout Lead to drive the physical implementation of complex analog and mixed-signal circuits for custom chips powering VR/AR wearables. You will own full-custom layout, define methodologies, and collaborate with circuit design and verification to meet aggressive power, performance, and area targets.

You will lead layout of PLLs, ADCs, DACs, LDOs, and high-speed I/O, establish floorplans, mentor engineers, and drive DRC/LVS and