Lead Analog Layout Engineer, Custom Silicon

Lumilens Inc.; San Jose, Northern (CA, KY); Hybrid; USD 180,000 - 260,000; Full time

Benefits offered by this job

Health insurance

Competitive salary

Professional development

Job summary

Lumilens Inc. seeks an Analog Layout Lead to drive full-custom analog and mixed-signal layout for next-generation silicon. You will lead complex layouts, define methodologies, and ensure parasitic-aware designs across multiple CMOS nodes, collaborating with circuit and physical design teams for tape-out readiness.

You will mentor layout engineers, establish floorplanning strategies, and coordinate with process-tech teams to qualify new nodes and ensure high-quality sign-off across projects.

Qualifications

• 8+ years of full-custom analog and mixed-signal layout experience for production silicon.
• Experience with 28nm or below CMOS nodes preferred.
• Proven ability to lead layout teams and mentor engineers.
• Expertise in matching, shielding, noise isolation, and signal integrity in mixed-signal designs.

Responsibilities

• Lead full-custom layout of complex analog and mixed-signal blocks, including PLLs, ADCs, DACs, LDOs, bandgaps, and high-speed I/O for custom silicon platforms.
• Define and enforce analog layout methodologies, design rules, and best practices across the physical design team.
• Drive parasitic-aware layout strategies to meet stringent noise, matching, signal integrity, and power requirements.
• Collaborate with circuit designers to translate schematic intent into optimized physical implementations, iterating on LVS/PEX results.
• Own physical verification closure, including DRC, LVS, antenna checks, and sign-off readiness across advanced process nodes.
• Establish floorplanning and integration strategies for analog IP blocks within larger mixed-signal SoC contexts.
• Provide technical guidance and layout direction to engineers and contractors, reviewing layouts and driving consistency in methodology, quality, and schedule execution.
• Partner with process technology and design kit teams to evaluate new process nodes, contribute to PDK qualification, and resolve layout-induced issues.
• Own long-term physical design roadmaps and methodology investments across multiple silicon programs.

Skills

Analog layout

Full-custom layout

Mixed-signal design

Cadence Virtuoso

Layout verification

Parasitic extraction

Tape-out experience

Mentoring layout engineers

28nm process experience

Education

Bachelor's degree in Electrical Engineering

Tools

Spectre

Calibre

Job description

Lumilens Inc. seeks an Analog Layout Lead to drive full-custom analog and mixed-signal layout for next-generation silicon. You will lead complex layouts, define methodologies, and ensure parasitic-aware designs across multiple CMOS nodes, collaborating with circuit and physical design teams for tape-out readiness.

You will mentor layout engineers, establish floorplanning strategies, and coordinate with process-tech teams to qualify new nodes and ensure high-quality sign-off across projects.