Senior Analog Layout Lead – High-Speed IP

Celero Communications, Inc.; USA; Remote; USD 180.000 - 250.000; Vollzeit

Zusammenfassung

Celero Communications, Inc. is seeking a Principal/Senior Analog Layout Engineer to drive the layout of complex analog and mixed-signal IP blocks for cutting-edge optical communication systems. You will lead a fast-paced AMS design team and mentor others while delivering first-pass silicon results.

You will own floor planning, routing, LVS/DRC/PERC checks, and collaborate with circuit designers, CAD/PDK teams, and international teams to ensure high-performance, reliable layouts.

Qualifikationen

• Minimum 10+ years of hands-on analog/mixed-signal layout design in advanced CMOS/FinFET tech.
• Led IP layout macros or full-chip layouts and handed off to Physical Design.
• Experience with TSMC FinFET nodes (N3/N5/N7/N16) and understanding of LOD/WPE/LDE effects.
• Familiar with LVS/DRC/PERC/ERC and layout verification flows.
• Strong documentation and cross-functional communication skills.

Aufgaben

• Lead physical layout of analog/mixed-signal macros from floor planning to verification.
• Collaborate with schematic designers for optimal layout solutions.
• Mentor junior layout engineers and contractors across time zones.
• Perform LVS, DRC, PERC, ERC, and signoff checks.
• Contribute to top-level floor planning and power/ground grid design.
• Support layout automation via scripting (SKILL, TCL, Python) is a plus.

Kenntnisse

Leadership

Layout design

Analog/mixed-signal

Problem solving

Mentoring

Tools

Cadence Virtuoso

Calibre

Pegasus

Jobbeschreibung

Celero Communications, Inc. is seeking a Principal/Senior Analog Layout Engineer to drive the layout of complex analog and mixed-signal IP blocks for cutting-edge optical communication systems. You will lead a fast-paced AMS design team and mentor others while delivering first-pass silicon results.

You will own floor planning, routing, LVS/DRC/PERC checks, and collaborate with circuit designers, CAD/PDK teams, and international teams to ensure high-performance, reliable layouts.