Senior Physical Design Engineer

eInfochips (An Arrow Company); San Jose (CA); On-site; USD 130,000 - 170,000; Full time

Benefits offered by this job

401k with matching contributions

Disability Insurance

Health Savings Account (HSA) / Health)

Tuition Reimbursement

And more!

Job summary

eInfochips, an Arrow company, seeks an experienced physical design engineer to drive synthesis, PnR, and timing convergence for ASIC partitions on-site in San Jose, CA. You will work with architects, RTL, and DFT teams to ensure design signoffs and address EM/IR challenges.

Preferred candidates have 7+ years in SoC physical design, deep PD flows, and proficiency with Innovus and Genus. This role emphasizes tight schedules and collaboration with EDA vendors.

Qualifications

• Bachelor's degree or equivalent practical experience in a technical field.
• 7+ years hands-on experience in physical design and implementation including synthesis, PnR, timing convergence and physical verification.

Responsibilities

• Execute synthesis, PNR, and STA for assigned partitions of ASIC chip within schedules and goals.
• Collaborate with architects, RTL designers, and DFT engineers to resolve implementation and signoff issues.
• Close EM/IR, drive LEC and physical verification signoff for partitions with methodology owners.
• Partner with design team to address physical design challenges for efficient iteration and convergence.
• Refine implementation methodologies including EMIR, PDN, and LEC, and troubleshoot flow issues with EDA vendors.

Skills

Synthesis

PnR

Timing convergence

Physical verification

Innovus

Genus

Education

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field

Tools

Innovus

Genus

Job description

• Execute synthesis, PNR, and STA for assigned partitions of ASIC chip adhering to strict schedules and design goals.
• Work closely with architects, RTL designers, and DFT engineers to resolve implementation and signoff issues across your blocks.
• Help close EM/IR, drive LEC and physical verification signoff for your partitions in coordination with methodology owners.
• Partner with the design team to proactively identify and address potential physical design challenges, enabling efficient iteration and convergence.
• Contribute to the refinement of other implementation and physical design methodologies, encompassing synthesis, place and route (PnR), electromigration and IR (EMIR), power delivery network (PDN), and logical equivalence checking (LEC).
• Troubleshoot flow issues and collaborate with EDA vendors to resolve them as needed.

What we are looking for:

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field, or equivalent practical experience.
• 7+ years of hands-on experience in physical design and implementation, encompassing synthesis, PnR, timing convergence and physical verification.
• Proficiency in utilizing Electronic Design Automation (EDA) tools such as Innovus, Genus, as well as a deep understanding of physical design flows and methodologies.

Preferred Qualifications:

• 7+ years of experience in physical design roles and related activities.
• Proven ability to adhere to tight schedules and implement low-power design techniques.
• Experience in System-on-Chip (SoC) design and implementation.
• Expertise in sub-7nm node technologies.
• Innovus, Genus

What’s In It for You:

• At Arrow, we recognize that financial rewards and great benefits are important aspects of an ideal job. That’s why we offer competitive financial compensation, including various compensation plans and a solid benefits package.
• 401k, With Matching Contributions
• Short-Term/Long-Term Disability Insurance
• Health Savings Account (HSA)/Health Reimbursement Account (HRA) Options
• Tuition Reimbursement
• And more!

Arrangement Fully On-Site:

Must be able to travel to an Arrow Client office location as requested by Arrow Client leadership.

Location:

Complete On-Site at San Jose, CA.

About eInfochips:

eInfochips, an Arrow company (Fortune #133), is a leading global provider of product engineering and semiconductor design services. A rich history of over two decades, with over 500+ products developed and 40M deployments in 140 countries, eInfochips continues to fuel technological innovations in multiple verticals. eInfochips has strategic technology partnerships with Qualcomm, NVIDIA, NXP, Analog Devices, Texas Instruments, Amazon, Microsoft and Google to name a few. Along with Arrow’s $38B in revenues, 22,000 employees, and 345 locations serving over 80 countries, eInfochips is primed to accelerate connected products innovation for 150,000+ global clients. eInfochips acts as a catalyst to Arrow’s Sensor-to-Sunset initiative and offers complete edge-to-cloud capabilities for its clients. Please visit www.einfochips.com for our portfolio of product engineering services across various industries & verticals.

EEO Statement:

Arrow is an equal opportunity employer. All applicants will be considered for employment without attention to race, color, religion, gender, age, sexual orientation, gender identity, national origin, veteran or disability status. (Arrow EEO/AAP policy).