RL Research Engineer: Chip Design & AI Systems

United States Digital Space LLC; San Francisco (CA); Hybrid; USD 500,000 - 850,000; Full time

Benefits offered by this job

Equity donation matching

Vacation and parental leave

Flexible working hours

Job summary

United States Digital Space LLC is hiring a Research Engineer for the Code RL team to advance chip design through reinforcement learning. The role focuses on designing silicon, with emphasis on RTL, verification, and physical design.

You will build RL environments, evaluate agentic design flows, and push research into production training runs. Strong candidates have ASIC/FPGA design experience, fluency with EDA tools, and a passion for safe, beneficial AI systems.

Qualifications

• Bachelor's degree in a field relevant to the role.
• Experience with RTL design and formal verification methods.
• Familiarity with EDA tools and chip design workflows.
• Goal-oriented with ability to balance research and engineering implementation.

Responsibilities

• Design, implement, and evaluate RL environments for chip design tasks (RTL, verification, physical design).
• Address cross-cutting RL concerns like EDA-tool latency and proxy rewards.
• Run experiments and help shape project roadmap.
• Deliver results into research and production training runs.
• Collaborate with researchers and engineers across teams.

Skills

ASIC design

FPGA design

RTL

UVM

Formal methods

PPA optimization

Education

Bachelor's degree

Tools

EDA tools

Place-and-route

Job description

United States Digital Space LLC is hiring a Research Engineer for the Code RL team to advance chip design through reinforcement learning. The role focuses on designing silicon, with emphasis on RTL, verification, and physical design.

You will build RL environments, evaluate agentic design flows, and push research into production training runs. Strong candidates have ASIC/FPGA design experience, fluency with EDA tools, and a passion for safe, beneficial AI systems.