Founding RTL Design Engineer for AI Chip Platform

80Twenty; San Francisco (CA); Vor Ort; USD 180.000 - 250.000; Vollzeit

Benefits dieser Stelle

Competitive compensation

Startup equity upside

High visibility

Zusammenfassung

A startup in cutting-edge AI hardware in San Francisco is seeking a Design Engineer to define and build RL environments and contribute to hardware engineering automation. The candidate should have 4–10+ years of RTL experience and strong debugging and scripting skills. This is a full-time position offering competitive compensation in a high-impact environment. Join the founding engineering team to influence product development and company success.

Qualifikationen

• 4–10+ years of RTL design or verification experience using System Verilog.
• Strong debugging and automation skills are required.
• Experience in fast-moving startup environments.

Aufgaben

• Define and build the RL environment and product catalog.
• Manage a team to design and verify modules and SoCs.
• Collaborate with AI researchers to automate hardware engineering tasks.

Kenntnisse

RTL design or verification experience

Strong debugging skills

Scripting (Python/TCL)

Collaboration across teams

Automation skills

Tools

System Verilog

Industry-standard flows

Jobbeschreibung

A startup in cutting-edge AI hardware in San Francisco is seeking a Design Engineer to define and build RL environments and contribute to hardware engineering automation. The candidate should have 4–10+ years of RTL experience and strong debugging and scripting skills. This is a full-time position offering competitive compensation in a high-impact environment. Join the founding engineering team to influence product development and company success.